XIO2001 datasheet(27/131 Pages) TI

27 / 131 page

XIO2001 PCI Express™ to PCI Bus Translation Bridge

www.ti.com

SCPS212B – MAY 2009 – REVISED JULY 2009

Table 2-10. Miscellaneous Terminals (continued)

ZGU

ZAJ

I/O

CELL

CLAMP

EXTERNAL

SIGNAL

DESCRIPTION

BALL #

TYPE

RAIL

PARTS

GRST

N13

M11

VDD_33

Global reset input. Asynchronously resets all

CMOS

_COMBIO

logic in device, including sticky bits and power

management state machines.

–

Note:

The

GRST

input

buffer

has

both

hysteresis and an internal active pullup. The

pullup is active at all times.

PCLK66_S

B12

A11

VDD_33

PCI clock select. This terminal determines the

CMOS

default PCI clock frequency driven out the

CLKOUTx terminals.

0 = 50 MHz PCI Clock

Optional

pulldown

1 = 66 MHz PCI Clock

resistor

Note: This terminal has an internal active

pullup resistor. This pullup is active at all times.

Note: M66EN terminal also has an affect of

PCI clock frequency.

SERIRQ

N08

M08

I/O

PCI Bus

PCIR

Serial IRQ interface. This terminal functions as

Pullup or

a serial IRQ interface if a pullup is detected

pulldown

when PERST is deasserted. If a pulldown is

resistor

detected, then the serial IRQ interface is

disabled.

VREG_PD3

D12

E11

VDD_33

3.3-V voltage regulator powerdown. This

CMOS

_COMBIO

Pulldown

terminal should always be tied directly to

resistor

ground or an optional pulldown resistor can be

used.

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