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H838532H датащи(PDF) 146 Page - Renesas Technology Corp |
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H838532H датащи(HTML) 146 Page - Renesas Technology Corp |
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146 / 508 page ![]() Section 6 ROM Rev. 1.00 May 30, 2008 Page 126 of 484 REJ09B0436-0100 6.3 Descriptions of Registers of the Flash Memory 6.3.1 Flash Memory Control Register 1 (FLMCR1) Bit Initial value Read/Write 7 — 0 — 6 SWE 0 R/W 5 ESU 0 R/W 4 PSU 0 R/W 3 EV 0 R/W 0 P 0 R/W 2 PV 0 R/W 1 E 0 R/W FLMCR1 is a register that makes the flash memory change to program mode, program-verify mode, erase mode, or erase-verify mode. For details on register setting, refer to section 6.5, Flash Memory Programming/Erasing. By setting this register, the flash memory enters program mode, erase mode, program-verify mode, or erase-verify mode. Read the data in the state that bits 6 to 0 of this register are cleared when using flash memory as normal built-in ROM. Bit 7—Reserved This bit is always read as 0 and cannot be modified. Bit 6—Software Write Enable (SWE) This bit is to set enabling/disabling of programming/enabling of flash memory (set when bits 5 to 0 and the EBR register are to be set). Bit 6 SWE Description 0 Programming/erasing is disabled. Other FLMCR1 register bits and all EBR bits cannot be set. (initial value) 1 Flash memory programming/erasing is enabled. |
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