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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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H838532H датащи(PDF) 85 Page - Renesas Technology Corp |
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H838532H датащи(HTML) 85 Page - Renesas Technology Corp |
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85 / 508 page  Section 3 Exception Handling Rev. 1.00 May 30, 2008 Page 65 of 484 REJ09B0436-0100 (2) Interrupt Enable Register 1 (IENR1) Bit Initial value Read/Write 7 IENTA 0 R/W 6 — 0 R/W 5 IENWP 0 R/W 4 IEN4 0 R/W 3 IEN3 0 R/W 0 IEN0 0 R/W 2 IEN2 0 R/W 1 IEN1 0 R/W IENR1 is an 8-bit read/write register that enables or disables interrupt requests. Bit 7: Timer A interrupt enable (IENTA) Bit 7 enables or disables timer A overflow interrupt requests. Bit 7 IENTA Description 0 Disables timer A interrupt requests (initial value) 1 Enables timer A interrupt requests Bit 6: Reserved bit Bit 6 is a readable/writable reserved bit. It is initialized to 0 by a reset. Bit 5: Wakeup interrupt enable (IENWP) Bit 5 enables or disables WKP 7 to WKP0 interrupt requests. Bit 5 IENWP Description 0 Disables WKP 7 to WKP0 interrupt requests (initial value) 1 Enables WKP 7 to WKP0 interrupt requests |
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