H838532H datasheet(93/508 Pages) RENESAS

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Section 3 Exception Handling

Rev. 1.00 May 30, 2008 Page 73 of 484

REJ09B0436-0100

Bit n:

WKPn edge select (WKEGSn)

Bit n selects

WKPn pin input sensing.

Bit n

WKEGSn

Description

WKPn pin falling edge detected

(initial value)

WKPn pin rising edge detected

(n = 7 to 0)

3.3.3

External Interrupts

There are 13 external interrupts: IRQ

4 to IRQ0 and WKP7 to WKP0.

(1) Interrupts WKP

7 to WKP0

Interrupts WKP

7 to WKP0 are requested by either rising or falling edge input to pins WKP7 to

WKP

0. When these pins are designated as pins WKP7 to WKP0 in port mode register 5 and a rising

or falling edge is input, the corresponding bit in IWPR is set to 1, requesting an interrupt.

Recognition of wakeup interrupt requests can be disabled by clearing the IENWP bit to 0 in

IENR1. These interrupts can all be masked by setting the I bit to 1 in CCR.

When WKP

7 to WKP0 interrupt exception handling is initiated, the I bit is set to 1 in CCR. Vector

number 9 is assigned to interrupts WKP

7 to WKP0. All eight interrupt sources have the same

vector number, so the interrupt-handling routine must discriminate the interrupt source.

(2) Interrupts IRQ

4 to IRQ0

Interrupts IRQ

4 to IRQ0 are requested by input signals to pins IRQ4 to IRQ0. These interrupts are

detected by either rising edge sensing or falling edge sensing, depending on the settings of bits

IEG4 to IEG0 in IEGR.

When these pins are designated as pins

IRQ

4 to IRQ0 in port mode register 3 and 1 and the

designated edge is input, the corresponding bit in IRR1 is set to 1, requesting an interrupt.

Recognition of these interrupt requests can be disabled individually by clearing bits IEN4 to IEN0

to 0 in IENR1. These interrupts can all be masked by setting the I bit to 1 in CCR.

When IRQ

4 to IRQ0 interrupt exception handling is initiated, the I bit is set to 1 in CCR. Vector

numbers 8 to 4 are assigned to interrupts IRQ

4 to IRQ0. The order of priority is from IRQ0 (high) to

IRQ

4 (low). Table 3.2 gives details.

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