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H838532H датащи(PDF) 87 Page - Renesas Technology Corp

номер детали H838532H
подробное описание детали  16-Bit Single-Chip Microcomputer H8 Family / H8/300H Super Low Power Series
PDF  508 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H838532H датащи(HTML) 87 Page - Renesas Technology Corp

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Section 3 Exception Handling
Rev. 1.00 May 30, 2008 Page 67 of 484
REJ09B0436-0100
Bit 5: Reserved bit
Bit 5 is a readable/writable reserved bit. It is initialized to 0 by a reset.
Bit 4: Timer G interrupt enable (IENTG)
Bit 4 enables or disables timer G input capture or overflow interrupt requests.
Bit 4
IENTG
Description
0
Disables timer G interrupt requests
(initial value)
1
Enables timer G interrupt requests
Bit 3: Timer FH interrupt enable (IENTFH)
Bit 3 enables or disables timer FH compare match and overflow interrupt requests.
Bit 3
IENTFH
Description
0
Disables timer FH interrupt requests
(initial value)
1
Enables timer FH interrupt requests
Bit 2: Timer FL interrupt enable (IENTFL)
Bit 2 enables or disables timer FL compare match and overflow interrupt requests.
Bit 2
IENTFL
Description
0
Disables timer FL interrupt requests
(initial value)
1
Enables timer FL interrupt requests
Bit 1: Timer C interrupt enable (IENTC)
Bit 1 enables or disables timer C overflow and underflow interrupt requests.
Bit 1
IENTC
Description
0
Disables timer C interrupt requests
(initial value)
1
Enables timer C interrupt requests



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