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H838532H датащи(PDF) 22 Page - Renesas Technology Corp |
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H838532H датащи(HTML) 22 Page - Renesas Technology Corp |
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22 / 508 page ![]() Section 1 Overview Rev. 1.00 May 30, 2008 Page 2 of 484 REJ09B0436-0100 1.1.2 Overview of Specifications Table 1.1 lists the functions of H8/38537 Group products in outline. Table 1.1 Overview of Functions Classification Module/ Function Description ROM • ROM lineup: Flash memory version and mask Rom version • ROM capacity: 16 K, 24 K, 32 K, 40 K, 48 K, and 60 Kbytes Memory RAM • RAM capacity: 1 Kbyte and 2 Kbytes CPU • H8/300H CPU (CISC type) Upward compatibility for H8/300 CPU at object level • Sixteen 16-bit general registers • Eight addressing modes • 64-Kbyte address space Program: 64 Kbytes available Data: 64 Kbytes available • 62 basic instructions, classifiable as bit arithmetic and logic instructions, multiply and divide instructions, bit manipulation instructions, and others • Minimum instruction execution time: 400 ns (for an ADD instruction while system clock φ = 5 MHz and V CC = 2.7 to 3.6 V) • On-chip multiplier (16 × 16 → 32 bits) Operating mode • Normal mode CPU MCU operating mode Mode: Single-chip mode • Low power consumption state (transition driven by the SLEEP instruction) Interrupt (source) Interrupt controller (INTC) • Thirteen external interrupt pins (IRQ4 to IRQ0, WKP7 to WKP0) • 23 internal interrupt sources • Independent vector addresses |
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