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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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H838532H датащи(PDF) 54 Page - Renesas Technology Corp |
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H838532H датащи(HTML) 54 Page - Renesas Technology Corp |
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54 / 508 page  Section 2 CPU Rev. 1.00 May 30, 2008 Page 34 of 484 REJ09B0436-0100 Table 2.4 Logic Operations Instructions Instruction Size* Function AND B/W/L Rd ∧ Rs → Rd, Rd ∧ #IMM → Rd Performs a logical AND operation on a general register and another general register or immediate data. OR B/W/L Rd ∨ Rs → Rd, Rd ∨ #IMM → Rd Performs a logical OR operation on a general register and another general register or immediate data. XOR B/W/L Rd ⊕ Rs → Rd, Rd ⊕ #IMM → Rd Performs a logical exclusive OR operation on a general register and another general register or immediate data. NOT B/W/L ¬ (Rd) → (Rd) Takes the one's complement (logical complement) of general register contents. Note: * Refers to the operand size. B: Byte W: Word L: Longword Table 2.5 Shift Instructions Instruction Size* Function SHAL SHAR B/W/L Rd (shift) → Rd Performs an arithmetic shift on general register contents. SHLL SHLR B/W/L Rd (shift) → Rd Performs a logical shift on general register contents. ROTL ROTR B/W/L Rd (rotate) → Rd Rotates general register contents. ROTXL ROTXR B/W/L Rd (rotate) → Rd Rotates general register contents through the carry flag. Note: * Refers to the operand size. B: Byte W: Word L: Longword |
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