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H838532H датащи(PDF) 10 Page - Renesas Technology Corp |
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H838532H датащи(HTML) 10 Page - Renesas Technology Corp |
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10 / 508 page ![]() Rev. 1.00 May 30, 2008 Page x of xx Contents Section 1 Overview ............................................................................................... 1 1.1 Features................................................................................................................................. 1 1.1.1 Application ........................................................................................................... 1 1.1.2 Overview of Specifications................................................................................... 2 1.2 List of Products..................................................................................................................... 6 1.3 Block Diagram...................................................................................................................... 8 1.4 Pin Assignment..................................................................................................................... 9 1.5 Pin Functions ...................................................................................................................... 10 Section 2 CPU ..................................................................................................... 15 2.1 Address Space and Memory Map ....................................................................................... 16 2.2 Register Configuration........................................................................................................ 23 2.2.1 General Registers................................................................................................ 24 2.2.2 Program Counter (PC) ........................................................................................ 25 2.2.3 Condition-Code Register (CCR)......................................................................... 25 2.3 Data Formats....................................................................................................................... 27 2.3.1 General Register Data Formats........................................................................... 27 2.3.2 Memory Data Formats ........................................................................................ 29 2.4 Instruction Set..................................................................................................................... 30 2.4.1 Table of Instructions Classified by Function ...................................................... 30 2.4.2 Basic Instruction Formats ................................................................................... 40 2.5 Addressing Modes and Effective Address Calculation....................................................... 41 2.5.1 Addressing Modes .............................................................................................. 41 2.5.2 Effective Address Calculation ............................................................................ 45 2.6 Basic Bus Cycle .................................................................................................................. 47 2.6.1 Access to On-Chip Memory (RAM, ROM)........................................................ 47 2.6.2 On-Chip Peripheral Modules .............................................................................. 48 2.7 CPU States .......................................................................................................................... 49 2.8 Usage Notes ........................................................................................................................ 51 2.8.1 Notes on Data Access to Empty Areas ............................................................... 51 2.8.2 EEPMOV Instruction.......................................................................................... 51 2.8.3 Bit-Manipulation Instruction .............................................................................. 51 2.8.4 Notes on Use of the EEPMOV Instruction ......................................................... 57 Section 3 Exception Handling ............................................................................. 59 3.1 Overview ............................................................................................................................ 59 |
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