H838532H datasheet(46/508 Pages) RENESAS

46 / 508 page

Section 2 CPU

Rev. 1.00 May 30, 2008 Page 26 of 484

REJ09B0436-0100

Bit

Bit Name

Initial

Value

R/W

Description

R/W

Interrupt Mask Bit

Masks interrupts other than NMI when set to 1. NMI is

accepted regardless of the I bit setting. The I bit is set

to 1 at the start of an exception-handling sequence.

Undefined

R/W

User Bit

Can be written and read by software using the LDC,

STC, ANDC, ORC, and XORC instructions.

Undefined

R/W

Half-Carry Flag

When the ADD.B, ADDX.B, SUB.B, SUBX.B, CMP.B,

or NEG.B instruction is executed, this flag is set to 1 if

there is a carry or borrow at bit 3, and cleared to 0

otherwise. When the ADD.W, SUB.W, CMP.W, or

NEG.W instruction is executed, the H flag is set to 1 if

there is a carry or borrow at bit 11, and cleared to 0

otherwise. When the ADD.L, SUB.L, CMP.L, or NEG.L

instruction is executed, the H flag is set to 1 if there is a

carry or borrow at bit 27, and cleared to 0 otherwise.

Undefined

R/W

User Bit

Can be written and read by software using the LDC,

STC, ANDC, ORC, and XORC instructions.

Undefined

R/W

Negative Flag

Stores the value of the most significant bit of data as a

sign bit.

Undefined

R/W

Zero Flag

Set to 1 to indicate zero data, and cleared to 0 to

indicate non-zero data.

Undefined

R/W

Overflow Flag

Set to 1 when an arithmetic overflow occurs, and

cleared to 0 at other times.

Undefined

R/W

Carry Flag

Set to 1 when a carry occurs, and cleared to 0

otherwise. Used by:

• Add instructions, to indicate a carry

• Subtract instructions, to indicate a borrow

• Shift and rotate instructions, to indicate a carry

The carry flag is also used as a bit accumulator by bit

manipulation instructions.

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