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SH7261 датащи(PDF) 33 Page - Renesas Technology Corp |
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SH7261 датащи(HTML) 33 Page - Renesas Technology Corp |
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33 / 1348 page ![]() Section 1 Overview Rev. 2.00 Sep. 07, 2007 Page 1 of 1312 REJ09B0320-0200 Section 1 Overview 1.1 SH7261 Group Features This LSI is a single-chip RISC (Reduced Instruction Set Computer) microprocessor that integrates a Renesas Technology original RISC CPU core with peripheral functions required for system configuration. The CPU incorporated in this LSI is the SH-2A CPU, which features upward compatibility on the object code level with the SH-1, SH-2, and SH-2E microcomputers. The CPU has a RISC-type instruction set and employs a superscalar architecture and the Harvard architecture, which greatly improves instruction execution speed. In addition, the 32-bit internal-bus architecture independent of the bus for the direct memory access controller (DMAC) enhances data processing power. This CPU realizes low-cost, high-performance, and high-functioning systems for applications such as high-speed realtime control, which has been next to impossible with the conventional microcomputers. This LSI has a floating-point unit and a cache. In addition, this LSI includes on-chip peripheral functions necessary for system configuration, such as, 32-Kbyte RAM for high-speed operation, a controller area network (RCAN-ET)* 1, IEBus TM*2 controller (IEB)*3, CD-ROM decoder (ROM-DEC), a serial sound interface (SSI), a serial communication interface with FIFO (SCIF), I 2C bus interface 3 (IIC3), a multi-function timer pulse unit 2 (MTU2), an 8-bit timer (TMR), a realtime clock (RTC), an A/D converter, a D/A converter, an interrupt controller (INTC), I/O ports, and advanced user debugger II (AUD-II). This LSI also provides an external memory access support function to enable direct connection to various memory devices or peripheral LSIs. These on-chip functions significantly reduce costs of designing and manufacturing application systems. The features of this LSI are listed in table 1.1. Notes: 1. R5S72611 and R5S72613 support this function. 2. The IEBus TM (Inter Equipment BusTM) is a trademark of NEC Electronics Corporation. 3. R5S72612 and R5S72613 support this function. |
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