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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SH7261 датащи(PDF) 99 Page - Renesas Technology Corp |
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SH7261 датащи(HTML) 99 Page - Renesas Technology Corp |
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99 / 1348 page  Section 3 Floating-Point Unit (FPU) Rev. 2.00 Sep. 07, 2007 Page 67 of 1312 REJ09B0320-0200 Section 3 Floating-Point Unit (FPU) 3.1 Features The FPU has the following features. • Conforms to IEEE754 standard • 16 single-precision floating-point registers (can also be referenced as eight double-precision registers) • Two rounding modes: Round to nearest and round to zero • Denormalization modes: Flush to zero • Five exception sources: Invalid operation, divide by zero, overflow, underflow, and inexact • Comprehensive instructions: Single-precision, double-precision, and system control When the FD bit in SR is set to 1, the FPU cannot be used, and an attempt to execute an FPU instruction will cause an FPU disable exception. 3.2 Data Formats 3.2.1 Floating-Point Format A floating-point number consists of the following three fields: • Sign (s) • Exponent (e) • Fraction (f) This LSI can handle single-precision and double-precision floating-point numbers, using the formats shown in figures 3.1 and 3.2. 31 30 23 22 0 s e f Figure 3.1 Format of Single-Precision Floating-Point Number |
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