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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SH7261 датащи(PDF) 48 Page - Renesas Technology Corp |
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SH7261 датащи(HTML) 48 Page - Renesas Technology Corp |
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48 / 1348 page  Section 1 Overview Rev. 2.00 Sep. 07, 2007 Page 16 of 1312 REJ09B0320-0200 Classification Symbol I/O Name Function PLLVCC I Power supply for PLL Power supply for the on-chip PLL oscillator. This LSI does not operate correctly if this pin is left open. Power supply PLLVSS I Ground for PLL Ground pin for the on-chip PLL oscillator. This LSI does not operate correctly if this pin is left open. EXTAL I XTAL O Crystal resonator/ external clock Pin connected to a crystal resonator. An external clock signal may also be input to the EXTAL pin. Clock CKIO I/O System clock I/O Input pin for an external clock or output pin for supplying the system clock to external devices Operating mode control MD1, MD0 I Mode set Pins to set the operating mode. Do not change signal levels on these pins during operation. MD_CLK1, MD_CLK0 I Clock mode set Pins to set the clock operating mode. Do not change signal levels on these pins during operation. ASEMD I Debugging mode This pin is valid when the E10A-USB emulator is in use. Otherwise, fix the signal level on this pin high. System control RES I Power-on reset This LSI enters the power-on reset state when this signal goes low. MRES I Manual reset This LSI enters the manual reset state when this signal goes low. WDTOVF O Watchdog timer overflow An overflow signal from the WDT is output on this pin. ASEBRKAK O Break mode acknowledge Indicates that the E10A-USB emulator has entered its break mode. ASEBRK* I Break request E10A-USB emulator break input pin |
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