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SH7261 датащи(PDF) 18 Page - Renesas Technology Corp |
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SH7261 датащи(HTML) 18 Page - Renesas Technology Corp |
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18 / 1348 page ![]() Rev. 2.00 Sep. 07, 2007 Page xviii of xxxii 12.7.15 Reset Sync PWM Mode Buffer Operation and Compare Match Flag .................. 563 12.7.16 Overflow Flags in Reset Synchronous PWM Mode ............................................. 564 12.7.17 Contention between Overflow/Underflow and Counter Clearing......................... 565 12.7.18 Contention between TCNT Write and Overflow/Underflow................................ 566 12.7.19 Cautions on Transition from Normal Operation or PWM Mode 1 to Reset-Synchronized PWM Mode ......................................................................... 566 12.7.20 Output Level in Complementary PWM Mode and Reset-Synchronized PWM Mode .......................................................................................................... 567 12.7.21 Interrupts in Module Standby Mode ..................................................................... 567 12.7.22 Simultaneous Capture of TCNT_1 and TCNT_2 in Cascade Connection............ 567 12.8 MTU2 Output Pin Initialization......................................................................................... 568 12.8.1 Operating Modes .................................................................................................. 568 12.8.2 Reset Start Operation ............................................................................................ 568 12.8.3 Operation in Case of Re-Setting Due to Error During Operation, etc. ................. 569 12.8.4 Overview of Initialization Procedures and Mode Transitions in Case of Error during Operation, etc. .................................................................................. 570 Section 13 8-Bit Timers (TMR) ........................................................................ 601 13.1 Features.............................................................................................................................. 601 13.2 Input/Output Pins...............................................................................................................603 13.3 Register Descriptions ......................................................................................................... 603 13.3.1 Timer Counter (TCNT)......................................................................................... 604 13.3.2 Time Constant Register A (TCORA) ................................................................... 604 13.3.3 Time Constant Register B (TCORB) .................................................................... 605 13.3.4 Timer Control Register (TCR).............................................................................. 605 13.3.5 Timer Counter Control Register (TCCR) ............................................................. 607 13.3.6 Timer Control/Status Register (TCSR)................................................................. 609 13.4 Operation ........................................................................................................................... 613 13.4.1 Pulse Output ......................................................................................................... 613 13.4.2 Reset Input ............................................................................................................ 614 13.5 Operation Timing............................................................................................................... 615 13.5.1 TCNT Count Timing ............................................................................................ 615 13.5.2 Timing of CMFA and CMFB Setting at Compare Match .................................... 616 13.5.3 Timing of Timer Output at Compare Match ......................................................... 616 13.5.4 Timing of Counter Clear by Compare Match ....................................................... 617 13.5.5 Timing of TCNT External Reset........................................................................... 617 13.5.6 Timing of Overflow Flag (OVF) Setting .............................................................. 618 13.6 Operation with Cascaded Connection................................................................................ 618 13.6.1 16-Bit Counter Mode ............................................................................................ 618 13.6.2 Compare Match Count Mode ............................................................................... 619 |
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