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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ECP2 датащи(PDF) 32 Page - Lattice Semiconductor |
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ECP2 датащи(HTML) 32 Page - Lattice Semiconductor |
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32 / 386 page  2-29 Architecture Lattice Semiconductor LatticeECP2/M Family Data Sheet LatticeECP2/M DSP Performance Table 2-11 lists the maximum performance in millions of MAC operations per second (MMAC) for each member of the LatticeECP2/M family. Table 2-11. DSP Performance For further information about the sysDSP block, please see the list of additional technical information at the end of this data sheet. Programmable I/O Cells (PIC) Each PIC contains two PIOs connected to their respective sysI/O buffers as shown in Figure 2-28. The PIO Block supplies the output data (DO) and the tri-state control signal (TO) to the sysI/O buffer and receives input from the buffer. Table 2-12 provides the PIO signal list. Device DSP Block DSP Performance GMAC ECP2-6 3 3.9 ECP2-12 6 7.8 ECP2-20 7 9.1 ECP2-35 8 10.4 ECP2-50 18 23.4 ECP2-70 22 28.6 ECP2M20 6 7.8 ECP2M35 8 10.4 ECP2M50 22 28.6 ECP2M70 24 31.2 ECP2M100 42 54.6 |
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