ECP2 datasheet(53/386 Pages) LATTICE

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DS1006 DC and Switching_01.7

February 2008

Data Sheet DS1006

or product names are trademarks or registered trademarks of their respective holders. The speciﬁcations and information herein are subject to change without notice.

Recommended Operating Conditions

Absolute Maximum Ratings

1, 2, 3

1. Stress above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional operation of the

device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

2. Compliance with the Lattice Thermal Management document is required.

3. All voltages referenced to GND.

Supply Voltage VCC . . . . . . . . . . . . . . . . . . . -0.5 to 1.32V

Supply Voltage VCCAUX . . . . . . . . . . . . . . . . -0.5 to 3.75V

Supply Voltage VCCJ . . . . . . . . . . . . . . . . . . -0.5 to 3.75V

Output Supply Voltage VCCIO . . . . . . . . . . . -0.5 to 3.75V

Input or I/O Tristate Voltage Applied

4 . . . . . . -0.5 to 3.75V

Storage Temperature (Ambient) . . . . . . . . . -65 to 150°C

Junction Temperature (Tj) . . . . . . . . . . . . . . . . . . +125°C

4. Overshoot and undershoot of -2V to (VIHMAX + 2) volts is permitted for a duration of <20ns.

Symbol

Parameter

Min.

Max.

Units

VCC

1, 4, 5

Core Supply Voltage

1.14

1.26

VCCAUX

1, 3, 4, 5

Auxiliary Supply Voltage

3.135

3.465

VCCPLL

PLL Supply Voltage

1.14

1.26

VCCIO

1, 2, 4

I/O Driver Supply Voltage

1.14

3.465

VCCJ

Supply Voltage for IEEE 1149.1 Test Access Port

1.14

3.465

tJCOM

Junction Temperature, Commercial Operation

°C

tJIND

Junction Temperature, Industrial Operation

-40

100

°C

SERDES External Power Supply (For LatticeECP2M Family Only)

VCCIB

Input Buffer Power Supply (1.2V)

1.14

1.26

Input Buffer Power Supply (1.5V)

1.425

1.575

VCCOB

Output Buffer Power Supply (1.2V)

1.14

1.26

Output Buffer Power Supply (1.5V)

1.425

1.575

VCCAUX33

Termination Resistor Switching Power Supply

3.135

3.465

VCCRX

Receive Power Supply

1.14

1.26

VCCTX

Transmit Power Supply

1.14

1.26

VCCP

PLL and Reference Clock Buffer Power

1.14

1.26

1. If VCCIO or VCCJ is set to 1.2V, they must be connected to the same power supply as VCC. If VCCIO or VCCJ is set to 3.3V, they must be con-

nected to the same power supply as VCCAUX. VCC and VCCPLL must be connected to the same power supply.

2. See recommended voltages by I/O standard in subsequent table.

3. VCCAUX ramp rate must not exceed 30mV/µs during power-up when transitioning between 0V and 3.3V.

4. For proper power-up conﬁguration, users must ensure that the conﬁguration control signals such as the CFGx, INITN, PROGRAMN and

DONE pins are driven to the proper logic levels when the device powers up. The device power-up is triggered by the last of VCC, VCCAUX or

VCCIO8 supplies that reaches its minimum valid levels. Alternatively, if the conﬁguration control signals are pulled up by VCCIO8, the VCCIO8

(conﬁguration I/O bank) voltage must be powered up prior to or at the same time as the last of VCC or VCCAUX reaches its minimum levels.

5. For power-up, VCC must reach its valid minimum value before powering up VCCAUX (LatticeECP2/M “S” version devices only).

6. VCCRX,VCCTX and VCCP must be tied together in each quad and all quads need to be powered up.

LatticeECP2/M Family Data Sheet

DC and Switching Characteristics

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