MPC8313E datasheet(82/92 Pages) FREESCALE

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MPC8313E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 1

Freescale Semiconductor

System Design Information

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Third, between the device and any SerDes voltage regulator there should be a 10-µF, low

equivalent series resistance (ESR) SMT tantalum chip capacitor and a 100-µF, low ESR SMT

tantalum chip capacitor. This should be done for all SerDes supplies.

21.5

Connection Recommendations

To ensure reliable operation, it is highly recommended to connect unused inputs to an appropriate signal

level. Unused active low inputs should be tied to NVDD, GVDD, LVDD, LVDDA or LVDDB as required.

Unused active high inputs should be connected to VSS. All NC (no-connect) signals must remain

unconnected.

Power and ground connections must be made to all external VDD, NVDD, GVDD, LVDD, LVDDA, LVDDB,

and VSS pins of the device.

21.6

Output Buffer DC Impedance

The MPC8313E drivers are characterized over process, voltage, and temperature. For all buses, the driver

is a push-pull single-ended driver type (open drain for I2C).

To measure Z0 for the single-ended drivers, an external resistor is connected from the chip pad to NVDD

or VSS. Then, the value of each resistor is varied until the pad voltage is NVDD/2 (see Figure 45). The

output impedance is the average of two components, the resistances of the pull-up and pull-down devices.

When data is held high, SW1 is closed (SW2 is open) and RP is trimmed until the voltage at the pad equals

NVDD/2. RP then becomes the resistance of the pull-up devices. RP and RN are designed to be close to each

other in value. Then, Z0 = (RP + RN)/2.

Figure 45. Driver Impedance Measurement

The value of this resistance and the strength of the driver’s current source can be found by making two

measurements. First, the output voltage is measured while driving logic 1 without an external differential

termination resistor. The measured voltage is V1 = Rsource × Isource. Second, the output voltage is measured

while driving logic 1 with an external precision differential termination resistor of value Rterm. The

NVDD

VSS

Pad

Data

SW1

SW2

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