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MPC8313E датащи(PDF) 35 Page - Freescale Semiconductor, Inc

номер детали MPC8313E
подробное описание детали  PowerQUICC??II Pro Processor Hardware Specifications
PDF  92 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8313E датащи(HTML) 35 Page - Freescale Semiconductor, Inc

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MPC8313E PowerQUICCII Pro Processor Hardware Specifications, Rev. 1
Freescale Semiconductor
35
USB
9USB
9.1
USB Dual-Role Controllers
This section provides the AC and DC electrical specifications for the USB interface.
9.1.1
USB DC Electrical Characteristics
Table 38 provides the DC electrical characteristics for the USB interface.
9.1.2
USB AC Electrical Specifications
Table 39 describes the general timing parameters of the USB interface.
Figure 19 and Figure 20 provide the AC test load and signals for the USB, respectively.
Figure 19. USB AC Test Load
Table 38. USB DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2.0
LVDDB+ 0.3
V
Low-level input voltage
VIL
–0.3
0.8
V
Input current
IIN
—±5
μA
High-level output voltage, IOH = –100 μAVOH
LVDDB – 0.2
V
Low-level output voltage, IOL = 100 μAVOL
—0.2
V
Table 39. USB General Timing Parameters (ULPI Mode Only)
Parameter
Symbol 1
Min
Max
Unit
Notes
USB clock cycle time
tUSCK
15
ns
Input setup to USB clock - all inputs
tUSIVKH
4—
ns
input hold to USB clock - all inputs
tUSIXKH
1—
ns
USB clock to output valid - all outputs
tUSKHOV
—7
ns
Output hold from USB clock - all outputs
tUSKHOX
2—
ns
Note:
1. The symbols used for timing specifications herein follow the pattern of t(First two letters of functional block)(signal)(state) (reference)(state)
for inputs and t(First two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tUSIXKH symbolizes USB
timing (USB) for the input (I) to go invalid (X) with respect to the time the USB clock reference (K) goes high (H). Also, tUSKHOX
symbolizes us timing (USB) for the USB clock reference (K) to go high (H), with respect to the output (O) going invalid (X) or
output hold time.
Output
Z0 = 50 Ω
NVDD/2
RL = 50 Ω



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