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MPC8313E датащи(PDF) 34 Page - Freescale Semiconductor, Inc |
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MPC8313E датащи(HTML) 34 Page - Freescale Semiconductor, Inc |
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34 / 92 page ![]() MPC8313E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 1 34 Freescale Semiconductor Ethernet: Three-Speed Ethernet, MII Management 8.4.3.2 SGMII Receive AC Timing Specifications Table 37 provides the SGMII transmit AC timing targets. A source synchronous clock is not supported. Figure 18. Receive Input Compliance Mask Table 37. SGMII Receiver AC Timing Specifications Parameter Symbol Min Max Unit Notes Deterministic Jitter Tolerance JD 0.37 — UI p-p Measured at receiver Combined Deterministic and Random Jitter Tolerance JDR 0.55 — UI p-p Measured at receiver Sinusoidal Jitter Tolerance Jsin 0.1 — UI p-p Measured at receiver Total Jitter Tolerance JT 0.65 — UI p-p Measured at receiver Bit Error Ratio BER — 10-12 — Unit Interval UI 800 800 ps +/– 100ppm 01 .275 .4 .6 .625 0 Vrx_diffpp_max/2 Vrx_diffpp_min/2 –Vrx_diffpp_min/2 –Vrx_diffpp_max/2 Time (UI) |
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