
TCC76x
Specification Rev. 0.07
February 23, 2005
32-bit RISC Microprocessor for Digital Media Player
CPU
Preliminary
3-2
3.2 Functional Description
For detailed description of the CPU, refer to “ARM940T Technical Reference Manual”.
3.2.1 Operating States
The ARM9TDMI core allows user application programs to freely switch between ARM
state using 32bit of instruction set and THUMB state using 16bit of instruction set.
The switching between two states does not affect internal registers and operating modes.
3.2.2 Memory Formats
The ARM940T itself can treat words in memory as being stored either in big-endian or
little-endian, but in the TCC76x, there is only little-endian supported by the memory
controller. The following figure illustrates the structure of little-endian type of memories.
0x99
0x66
0xAA
0x55
0xFE
0xDC
0xBA
0x98
0x76
0x54
0x32
0x10
Word Value
0x9966AA55
0xFEDCBA98
0x76543210
15
8 7
0
16
23
24
31
Higher Address
Lower Address
Higher Address
Lower Address
0
4
8
Figure 3.1 Little-Endian Addresses of Bytes-Words
3.2.3 Instruction Length
The instruction length can be either 32 bits (ARM state) or 16 bits (THUMB state).
3.2.4 Data Types
ARM940T supports byte (8 bits), half-word (16 bits), and word (32 bits) data types.
Words must be aligned to 4-byte boundaries and half words to 2-byte boundaries.
3.2.5 Operating Modes
ARM940T supports seven modes of operation:
USER (usr)
The normal ARM program execution mode
FIQ (fiq)
Designed to support a data transfer or channel process
IRQ (irq)
Used for general purpose interrupt handling
Supervisor (svc)
Protected mode for the operating system
Abort (abt)
Entered after a data or instruction prefetch abort
System (sys)
A privileged user mode for the operating system
Undefined (und)
Entered when an undefined instruction is executed
Switching between these modes may be made under software control, or may be brought
about by interrupts or exception processing. Most application programs will execute in
User mode. The non-user mode known as privileged modes are entered in order to
service interrupts or exceptions, or to access protected resources.