TCC76x
Specification Rev. 0.07
February 23, 2005
32-bit RISC Microprocessor for Digital Media Player
INTRODUCTION
Preliminary
1-30
Signal Name
Shared Signal
Ball
Type Description – TCC767
MS_D[1]
R1
I/O
MS/MSPRO Data Line [1]
MS_D[0]
P4
I/O
MS/MSPRO Data Line [0]
MS_CD
P7
I
MS/MSPRO Card Detection Input.
MS_PC
K3
O
MS/MSPRO Power Control.
MMC & SD Interface Pins
MMC_CLK
B13
O
MMC/SD Clock
MMC_CMD
A14
I/O
MMC/SD Command/Respond.
MMC_D[3]
A11
I/O
MMC/SD Data Line [3].
MMC_D[2]
B10
I/O
MMC/SD Data Line [2].
MMC_D[1]
A13
I/O
MMC/SD Data Line [1].
MMC_D[0]
B12
I/O
MMC/SD Data Line [0].
MMC_CD
R5
I
MMC/SD Card Detection Input.
MMC_PC
J4
O
MMC/SD Power Control.
MST[2]
R6
I
Memory Card Configuration Select Bit 2
MST
Configuration
111
Record in flash memory by AP
001
Only support MMC/SD card
010
Only support MS/MS_Pro/New MS card
011
Support two kinds of card above.
And
MMC/SD is the first slot in USB mode.
100
Support two kinds of card above.
And
MS/MS_Pro/New MS card is the first slot in
USB mode.
MST[1]
R7
I
Memory Card Configuration Select Bit 1
MST[0]
N9
I
Memory Card Configuration Select Bit 0
Flash Memory Interface Pins
ND_D[15]
A15
I/O
Flash Data Bus Bit 15
ND_D[14]
B14
I/O
Flash Data Bus Bit 14
ND_D[13]
E13
I/O
Flash Data Bus Bit 13
ND_D[12]
D14
I/O
Flash Data Bus Bit 12
ND_D[11]
C15
I/O
Flash Data Bus Bit 11
ND_D[10]
F13
I/O
Flash Data Bus Bit 10
ND_D[9]
D15
I/O
Flash Data Bus Bit 9
ND_D[8]
E14
I/O
Flash Data Bus Bit 8
ND_D[7]
P15
I/O
Flash Data Bus Bit 7
ND_D[6]
N13
I/O
Flash Data Bus Bit 6
ND_D[5]
M12
I/O
Flash Data Bus Bit 5
ND_D[4]
R15
I/O
Flash Data Bus Bit 4
ND_D[3]
R14
I/O
Flash Data Bus Bit 3
ND_D[2]
P13
I/O
Flash Data Bus Bit 2
ND_D[1]
R13
I/O
Flash Data Bus Bit 1
ND_D[0]
P12
I/O
Flash Data Bus Bit 0
ND_nCE[1]
P6
O
Flash Chip Enable 1, Low active.
ND_nCE[0]
R3
O
Flash Chip Enable 0, Low active.
ND_ALE
R10
O
Flash Address Latch Enable, High active.
ND_CLE
N10
O
Flash Command Latch Enable, High active.
ND_nOE
R9
O
Flash Read Control signal, Low active.
ND_nWE
P9
O
Flash Write Control signal, Low active.
ND_nWP
R12
O
Flash Write Protect Control signal, Low active.
ND_RDY
R11
I
Flash Ready/Busy signal. Pull-up resistor required.
ND_WP_CTL
A10
I
Flash Write Protect Control Enable. ND_nWP signal
output is enabled when this signal is high.
PRTST
K2
I
NAND Flash low level format control. Pull-up for normal
operation (low level format disabled).
AGN_nRESET
H15
O
Active low reset signal to AGAND Flash.
Miscellaneous Pins
ACT_nSPND
J13
O
Power Control Status Output. High indicates power on
state (Access Mode), low indicates power off state
(Suspend Mode).
ACS_IND
N4
O
Flash Memory Access Indicator. This signal will be
blinking when Flash Memory is accessed.
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