TCC76 datasheet(44/259 Pages) ETC2

44 / 259 page

TCC76x

Specification Rev. 0.07

February 23, 2005

32-bit RISC Microprocessor for Digital Media Player

INTRODUCTION

Preliminary

1-34

Signal Name

Shared Signal

Ball Type Description – TCC768

FCSN

A12

NOR Flash Chip Select. Should be connected to nCS[3].

USB/UART/IrDA Interface Pins

USB_DP

GPIO_B[26]

I/O

USB Function D+ signal / GPIO_B[26]

USB_DN

GPIO_B[27]

I/O

USB Function D- signal / GPIO_B[27]

USBH_DP

GPIO_B[28]

I/O

USB Host D+ signal / GPIO_B[28]

USBH_DN

GPIO_B[29]

I/O

USB Host D- signal / GPIO_B[29]

UT_TX

GPIO_B[8]

M10

I/O

UART or IrDA TX data / GPIO_B[8]

UT_RX

GPIO_B[9] / IDE_nCS1

I/O

UART or IrDARX data / GPIO_B[9] / IDE Chip Select 1

Audio Interface Pins

BCLK

GPIO_B[21] / BM[0]

I/O

I2S Bit Clock / GPIO_B[21] / Boot Mode Bit 0.

Internal pull-down resistor is active at power up.

LRCK

GPIO_B[22] / BM[1]

L11

I/O

I2S Word Clock / GPIO_B[22] / Boot Mode Bit 1

Internal pull-down resistor is active at power up.

MCLK

GPIO_B[23]

K12

I/O

I2S System Clock / GPIO_B[23]

DAO

GPIO_B[24] / BM[2]

K11

I/O

I2S Digital Audio data Output / GPIO_B[24] / Boot Mode Bit 2

DAI

GPIO_B[25]

K10

I/O

I2S Digital Audio data Input / GPIO_B[25]

ADCDAT

H10

I2S Digital Audio data Output of audio CODEC(ADC).

Must be connected externally to GPIO_B25 (DAI)

LCH_OUT

E11

DAC Left Channel Output of audio CODEC

RCH_OUT

E12

DAC Right Channel Output of audio CODEC

RCH_IN

ADC Right Channel Input of audio CODEC

MIC_IN

Microphone Input of audio CODEC

LCH_IN

ADC Left Channel Input of internal audio CODEC

VMID

Mid-rail reference decoupling point

MICBIAS

Microphone Bias

WMODE

CSB

CODEC I/F Control. Pull-down for normal operation. Internal

pull-up resistor is active at power up.

SDIN

GPIO_A[8] / BW[0]

I/O

2-Wire MCU Data Input for CODEC

SCLK

GPIO_A[9] / BW[1]

I/O

2-Wire MCU Clock Input for CODEC

CD DSP Interface Pins

CBCLK

GPIO_A[1]

I/O

CD Data Bit Clock Input / GPIO_A[1]

CLRCK

GPIO_A[2]

I/O

CD Data Word Clock Input / GPIO_A[2]

CDAI

GPIO_A[3]

I/O

CD Data Input / GPIO_A[3]

External Interrupt Pins

EXINT[3]

GPIO_A15

I/O

External Interrupt Request [3] / GPIO_A[15]

EXINT[2]

GPIO_A[14] / FGPIO[14]

I/O

External Interrupt Request [2] / GPIO_A[14] / FGPIO[14]

EXINT[1]

GPIO_A[13] / FGPIO[13]

I/O

External Interrupt Request [1] / GPIO_A[13] / FGPIO[13]

EXINT[0]

GPIO_A[12] / FGPIO[12]

I/O

External Interrupt Request [0] / GPIO_A[12] / FGPIO[12]

General Purpose I/O Pins

GPIO_A[15]

EXINT[3]

I/O

GPIO_A[15] / External Interrupt Request 3

GPIO_A[14]

EXINT[2] / FGPIO[14]

I/O

GPIO_A[14] / External Interrupt 2 / Fast GPIO bit 14

GPIO_A[13]

EXINT[1] / FGPIO[13]

I/O

GPIO_A[13] / External Interrupt 1 / Fast GPIO bit 13

GPIO_A[12]

EXINT[0] / FGPIO[12]

I/O

GPIO_A[12] / External Interrupt 0 / Fast GPIO bit 12

GPIO_A[11]

SDI2 / FGPIO[11] / SCL

I/O

GPIO_A[11] / GSIO2 Data In / Fast GPIO bit 11 / I2C Clock.

GPIO_A[10]

FRM2 / FGPIO[10] / SDA

I/O

GPIO_A[10] / GSIO2 FRM / Fast GPIO bit 10 / I2C Data Line.

GPIO_A[9] / BW[1]

SCK2 / FGPIO[9] / SCL

I/O

GPIO_A[9] / Bus Width bit 1. The status of BW[1:0] is latched at the

rising edge of nRESET and used to determine external bus width.

GPIO_A[8] / BW[0]

SDO2 / FGPIO[8] / SDA

I/O

GPIO_A[8] / Bus Width bit 0. The status of BW[1:0] is latched at the

rising edge of nRESET and used to determine external bus width.

GPIO_A[7]

SDI1 / FGPIO[7]

I/O

GPIO_A[7] / GSIO1 Data In / Fast GPIO bit 7

GPIO_A[6]

FRM1 / FGPIO[6]

I/O

GPIO_A[6] / GSIO1 FRM / Fast GPIO bit 6

GPIO_A[5]

SCK1 / FGPIO[5]

I/O

GPIO_A[5] / GSIO1 Clock / Fast GPIO bit 5

GPIO_A[4]

SDO1 / FGPIO[4]

I/O

GPIO_A[4] / GSIO1 Data Out / Fast GPIO bit 4

GPIO_A[3]

SDI0 / CDAI / FGPIO[3]

I/O

GPIO_A[3] / GSIO0 Data In / CD Interface Data / Fast GPIO bit 3.

GPIO_A[2]

FRM0 / CLRCK / FGPIO[2]

I/O

GPIO_A[2] / GSIO0 FRM / CD Interface LRCK / Fast GPIO bit 2

GPIO_A[1]

SCK0 / CBCLK / FGPIO[1]

I/O

GPIO_A[1] / GSIO0 Clock / CD Interface BCLK / Fast GPIO bit 1

GPIO_A[0]

SDO0 / FGPIO[0]

I/O

GPIO_A[0] / GSIO0 Data Out / FGPIO[0]

GPIO_B[29]

USBH_DN

I/O

GPIO_B[29] / USBH_DN

GPIO_B[28]

USBH_DP

I/O

GPIO_B[28] / USBH_DP

GPIO_B[27]

USB_DN

I/O

GPIO_B[27] / USB_DN

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