MPF0900AMMA2ES datasheet(171/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

OTP_BGM_RSTB[1:0]

BGMON RSTB debounce

100 μs

500 μs

Table 222. BGMON RSTB debounce time to assert RSTB via the DMS...continued

The BGM_CUTOFF[1:0] bits set the debounce time before the DMS sends a critical fault notification and

disables the power stages of the voltage regulators.

OTP_BGM_CUTOFF[1:0]

BGMON power cutoff debounce

No Power Cutoff

10 μs

100 μs

500 μs

Table 223. BGMON debounce time to enable the power cutoff via the DMS

14.12.2.3 VDIG_OV monitor fault protection

When the DMS detects a fault condition on the VDIG_OV monitor, the DMS will assert the FS0B output and the

VDIG_OV_I interrupt will be set. If the VDIG_OV fault condition is temporary, no critical fault will be generated,

but the VDIG_OV_I flag and the FS0B output remain asserted until the MCU is able to clear the VDIG_OV flag

and release the FS0B.

If the VDIG OV fault condition is persistent, the OTP_VDIGOV_RSTB[1:0] bits set the debounce time before the

DMS sends a critical fault to assert the RSTB pin.

OTP_VDIGOV_RSTB[1:0]

VDIG OV RSTB debounce

No Assertion

10 μs

100 μs

500 μs

Table 224. VDIG_OV debounce time to assert RSTB via the DMS

If the VDIG OV fault condition is persistent, the OTP_VDIGOV_CUTOFF[1:0] bits set the debounce time before

the DMS sends a critical fault to disable the power stages of the voltage regulators.

OTP_VDIGOV_CUTOFF[1:0]

VDIG OV power cutoff debounce

No power cutoff

10 μs

100 μs

500 μs

Table 225. VDIG_OV debounce time to enable the power cutoff via the DMS

PF09

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 16 December 2025

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