MPF0900AMMA2ES datasheet(82/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

If the XFAILB pin is pulled down externally, the device will prevent the Power-up sequence from starting until the

pin is no longer held low externally.

This will help the PMICs to synchronize the Power-up sequence, only after all PMICs are ready to initiate a

power-up sequence.

aaa-056066

Power-up

sequence

Self-test

LPOFF

States

DBG OFF

XFAILB during power-up

SYSTEM ON

Bidirectional XFAILB (power up)

PWRON

XFAILB

RSTB

POWER-UP

SEQUENCE

Figure 21. XFAILB during Power-up

12.8.13.2 Power-down synchronization

When two or more PMICs are synchronized using XFAILB, the power-down event can be started locally

(requested by the MCU or due to a fault condition) or started externally when the PF09 detects a transition on

the XFAILB bit.

When an internal power-up sequence failure is detected, the XFAILB pin will be asserted low right before the

device starts turning off all the supplies that were already turned on during the Power-up sequence.

If XFAILB is asserted low externally during the Power-up sequence, the device will detect an external Power-up

sequence failure, assert its own XFAILB pin, and turn off all supplies immediately.

During the system-on states, a turn-off event started locally will assert the XFAILB pin before starting the

power-down sequence to request a turn-off event on all the devices connected to the XFAILB bus, in order to

synchronize the power-down sequence of all the PMICs connected together.

During the SYSTEM ON states, If the XFAILB pin is externally pulled low, the PF09 will assert the XFAILB pin

low internally, and the device will start a power-down sequence.

During a ard reset event (RSTB pin is asserted low), the device will assert the XFAILB pin low before it starts

the power-down sequence, and it will hold the XFAILB pin low while the power-down sequence is in progress

(including the power-down delay). At this point, the device will load the default configuration, release the XFAILB

internally and wait until all PMICs have released the XFAIL bus, to start the new Power-up sequence at the

same time.

PF09

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 16 December 2025

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