MPF0900AMMA2ES datasheet(50/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

If a switching regulator is programmed to turn off upon an OV or UV fault ant the SWx_FLT_REN = 1, the

switching regulator will be re-enabled 500 μs after the regulator output has finished its discharge cycle.

If an LDO regulator is programmed to turn off upon an OV or UV fault and the LDOx_FLT_REN = 1, the LDO

regulator will allow up to 1000 μs to discharge the output before trying to turn the LDO back on.

If an LDO or switching regulator is programmed to turn off upon an OV or UV fault and the _FLT_REN bit

is set to 0, the regulator will remain disabled and the MCU can turn it back on by toggling off and on the

corresponding enable/mode bits.

The _FLT_REN bits are defaulted to 1 at power-up, and the MCU is expected to configure the desired behavior

for each voltage regulator during the system configuration sequence during the booting stage.

12.6.2.2 Fault bypass control

The PF09 provides a set of fault bypass configuration bits to assign different levels of priority to each specific

fault for each voltage regulator and external voltage monitor.

The system LDOs and switching regulators are provided with an _IL_BYP bit to bypass the ILIM protection

mechanisms. By default, the _IL_BYP bits are set to 1 and the MCU is expected to set the desired configuration

during the system configuration sequence at power-up.

SWx_IL_BYP LDOx_IL_BYP

ILIM protection

Enabled

Bypassed

Table 47. ILIM protection bypass bit

The System LDOs and switching regulators are provided with an _OV_BYP bits to bypass the OV protection

mechanism on the respective block. By default the _OV_BYP bits are set to 0 and the MCU is expected to set

the desired configuration during the system configuration sequence at power-up.

SWx_OV_BYP LDOx_OV_BYP

OV protection

Enabled

Bypassed

Table 48. OV protection bypass bit

The System LDOs and switching regulators are provided with an _UV_BYP bits to bypass the UV protection

mechanism on the respective block. By default the _UV_BYP bits are set to 0 and the MCU is expected to set

the desired configuration during the system configuration sequence at power-up.

SWx_UV_BYP LDOx_UV_BYP

UV protection

Enabled

Bypassed

Table 49. UV protection bypass bit

The table below lists all the functional bits associated with enabling/disabling the voltage regulators when they

experience an OV/UV condition.

Regulator

bit to bypass a current limit bit to bypass an undervoltage

bit to bypass an overvoltage

SW1

SW1_IL_BYP

SW1_UV_BYP

SW1_OV_BYP

SW2

SW2_IL_BYP

SW2_UV_BYP

SW2_OV_BYP

Table 50. Bits to enable/disable regulators at UV/OV

PF09

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 16 December 2025

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