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TMP93CS41 датащи(PDF) 231 Page - Toshiba Semiconductor |
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TMP93CS41 датащи(HTML) 231 Page - Toshiba Semiconductor |
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231 / 248 page ![]() TMP93CS40/TMP93CS41 2004-02-10 93CS40-229 (4) Pattern generator Symbol Name Address 7 6 5 4 3 2 1 0 PG03 PG02 PG01 PG00 SA03 SA02 SA01 SA00 W R/W PG0REG PG0 register 4CH (Prohibit RMW) 0 0 0 0 Undefined PG13 PG12 PG11 PG10 SA13 SA12 SA11 SA10 W R/W PG1REG PG1 register 4DH (Prohibit RMW) 0 0 0 0 Undefined PAT1 CCW1 PG1M PG1TE PAT0 CCW0 PG0M PG0TE R/W 0 0 0 0 0 0 0 0 PG01CR PG0, 1 control 4EH 0: 8-bit write 1: 4-bit write 0: Normal rotation 1: Reverse rotation 0: 4-bit step 1: 8-bit step PG1 trigger input enable 1: Enable 0: 8-bit write 1: 4-bit write 0: Normal rotation 1: Reverse rotation 0: 4-bit step 1: 8-bit step PG0 trigger input enable 1: Enable (5) Watchdog timer Symbol Name Address 7 6 5 4 3 2 1 0 WDTE WDTP1 WDTP0 WARM HALTM1 HALTM0 RESCR DRVE R/W 1 0 0 0 0 0 0 0 WDMOD Watchdog timer mode 5CH 1: WDT enable 00: 2 15/fSYS 01: 2 17/fSYS 10: 2 19/fSYS 11: 2 21/fSYS Warm-up time 0: 2 14/inputted frequency 1: 2 16/inputted frequency Standby mode 00: RUN mode 01: STOP mode 10: IDLE1 mode 11: IDLE2 mode 1: Connect internally WDT out to reset pin 1: Drive the pin in STOP mode − W − WDCR Watchdog timer control register 5DH B1H: WDT disable code 4EH: WDT clear code |
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