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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP93CS41 датащи(PDF) 190 Page - Toshiba Semiconductor |
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TMP93CS41 датащи(HTML) 190 Page - Toshiba Semiconductor |
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190 / 248 page  TMP93CS40/TMP93CS41 2004-02-10 93CS40-188 3.11.3 Operational Description (1) Mode 0 (I/O interface mode) This mode is used to increase the number of I/O pins available for transmitting data to or receiving data from an external shift register. This mode encompasses the SCLK output mode for outputting a synchronous clock SCLK and the SCLK input mode for inputting an external synchronous clock SCLK. Figure 3.11.18 Example of SCLK Output Mode Connection Figure 3.11.19 Example of SCLK Input Mode Connection A B C D E F G H QH CLOCK L S/ RXD SCLK PORT TMP93CS40 TC74HC165 or equivalent A B C D E F G H SI SCK RCK Shift register Output extension TXD SCLK PORT TMP93CS40 TC74HC595 or equivalent Input extension Shift register Output port extension Input port extension A B C D E F G H QH CLOCK L S/ RXD SCLK PORT TMP93CS40 TC74HC165 or equivalent A B C D E F G H SI SCK RCK TXD SCLK PORT TMP93CS40 TC74HC595 or equivalent External clock Shift register Shift register External clock |
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