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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP93CS41 датащи(PDF) 180 Page - Toshiba Semiconductor |
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TMP93CS41 датащи(HTML) 180 Page - Toshiba Semiconductor |
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180 / 248 page  TMP93CS40/TMP93CS41 2004-02-10 93CS40-178 Figure 3.11.13 shows the block diagram for serial channel 1. Note: SLCK1 pin can only be used for I/O in I/O interface mode. Figure 3.11.13 Block Diagram for Serial Channel 1 INTRX1 System clock/fSYS (φ1) φT0 φT2 φT8 φT32 BR1CR<BR1CK1:0> Serial clock generation circuit SC1MOD <SC1:0> UART TO0TRG (Timer 0 comparator output) Baud rate generator SC1CR <IOC> ÷2 I/O interface mode SC1MOD <SM1:0> SIOCLK INTTX1 Serial channel interrupt control Transmission counter (UART only ÷ 16) TXDCLK Transmission control RXD1 (Shared by P94) TB8 Transmission buffer (SC1BUF) TXD1 (Shared by P93) RB8 Receive buffer 2 (SC1BUF) SC1CR <OERR> <PERR> <FERR> Internal data bus SC1CR <PE> Parity control Receive buffer 1 (Shift register) Error flag RXDCLK SC1MOD <RXE> <EVEN> Receive counter (UART only ÷ 16) SC1MOD <WU> Receive control SCLK1 input (Shared by P95) SCLK1 output (Shared by P95) <BR1S3:0> |
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