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TMP93CS41 датащи(PDF) 132 Page - Toshiba Semiconductor |
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TMP93CS41 датащи(HTML) 132 Page - Toshiba Semiconductor |
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132 / 248 page ![]() TMP93CS40/TMP93CS41 2004-02-10 93CS40-130 3.9 16-Bit Timers The TMP93CS40 and TMP93CS41 contain two multifunctional 16-bit timer/event counters (Timer 4 and timer 5) which support the following operation modes. • 16-bit interval timer mode • 16-bit event counter mode • 16-bit programmable pulse generation (PPG) mode • Frequency measurement mode • Pulse width measurement mode • Time differential measurement mode Each timer/event counter consists of a 16-bit up counter, two 16-bit timer registers (One with a double-buffer), two 16-bit capture registers, two comparators, a capture input controller, a timer flip-flop and the control circuit. Timer/event counters are controlled by 4 control registers: T4MOD/T5MOD, T4FFCR/T5FFCR, TRUN and T45CR. Figure 3.9.1, Figure 3.9.2 show the block diagram of the 16-bit timer/event counters (Timer 4 and timer 5). Timers 4 and 5 can be used independently. All timers operate in the same manner except for the following points, and thus only the operation of timer 4 will be explained below. Points Differing between Timers 4 and 5 16-Bit Timer 4 16-Bit Timer 5 Timer out pin TO4 pin (TFF4) TO5 pin (TFF5) TO6 pin (TFF6) Different phased pulse output mode Yes No (No TO7 pin) |
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