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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP93CS41 датащи(PDF) 130 Page - Toshiba Semiconductor |
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TMP93CS41 датащи(HTML) 130 Page - Toshiba Semiconductor |
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130 / 248 page  TMP93CS40/TMP93CS41 2004-02-10 93CS40-128 2. Generating a 50% square wave To generate a 50% square wave, invert the timer flip-flop at a fixed interval and output the timer flip-flop value to the timer output pin (TO2). Example: To output a 2.4 µs square wave at fc = 20 MHz from the TO2 pin, set the registers as follows. Clock condition System clock: High frequency (fc) Clock gear: 1 (fc) Prescaler clock: fFPH 7 6 5 4 3 2 1 0 TRUN ← − X − − − 0 − − Stops PWM0 and clears it. P0MOD ← X 0 1 1 0 0 X X Sets 8-bit timer mode and selects φP1 (0.2 µs) as the input clock. TREG2 ← 0 0 0 0 0 1 1 0 Sets 2.4 µs ÷ 0.2 µs ÷ 2 = 6 in the timer register. PFFCR ← − − − − 1 0 0 1 Clears TFF2 and inverts using comparator output. P7CR ← X X X X − 1 − − P7FC ← X X X X − 1 − X Sets P72 as the TO2 pin. TRUN ← 1 X − − − 1 − − Starts counting PWM0. X: Don’t care, −: No change Figure 3.8.12 Square Wave (50% duty) Output Timing Chart φP1 TRUN Up counter Comparator timing 1.2 µs (at fc = 20 MHz) 01 Match detect UC clear TFF2 TO2 02 03 04 05 06 01 02 04 05 06 01 02 |
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