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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP93CS32F датащи(PDF) 119 Page - Toshiba Semiconductor |
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TMP93CS32F датащи(HTML) 119 Page - Toshiba Semiconductor |
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119 / 180 page  TMP93CS32 2004-02-10 93CS32-117 Figure 3.9.10 shows the block diagram of the serial channel 1. Figure 3.9.10 Block Diagram of the Serial Channel 1 TXD1 (Shared with P63) φT0 φT2 φT8 φT32 SC1MOD <SC1:0> Receive buffer1(Shift register) RXDCLK SC1MOD<CTSE1> TO2TRG (Timer 2 comparator output) UART mode <BR1S3:0> Baud rate generator SC1MOD <SM1:0> ÷2 External clock I/O interface mode SC1CR <IOC> Receive counter (UART only ÷16) Transmission counter (UART only ÷16) Receive control Transmission control INTRX1 INTTX1 Receive buffer2 (SC1BUF) RB8 Error flag Serial channel interrupt control TB8 CTS1 (Shared with P65) Transmission buffer (SC1BUF) RXD1 (Shared with P64) TXDCLK SC1MOD <WU> System clock fSYS (φ1) SC1MOD<RXE> SCLK1 Output (Shared with P65) SCLK1 input (Shared with P65) SIOCLK Internal data bus Parity control SC1CR <PE> <EVEN> Serial clock generation circuit BR1CR<BR1CK1:0> SC1CR <OERR> <PERR> <FERR> |
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