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TMP93CS32F датащи(PDF) 94 Page - Toshiba Semiconductor |
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TMP93CS32F датащи(HTML) 94 Page - Toshiba Semiconductor |
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94 / 180 page ![]() TMP93CS32 2004-02-10 93CS32-92 Timer 5 Flip-Flop Control Register 7 6 5 4 3 2 1 0 Bit symbol CAP4T6 CAP3T6 EQ7T6 EQ6T6 TFF6C1 TFF6C0 T5FFCR (0049H) Read/Write R/W W After reset 0 0 0 0 1 1 TFF6 invert trigger 0: Disable trigger 1: Enable trigger Function Invert when the UC value is loaded to CAP4. Invert when the UC value is loaded to CAP3. Invert when the UC matches TREG7. Invert when the UC matches TREG6. TFF6 control 00: Invert TFF6 01: Set TFF6 10: Clear TFF6 11: Don’t care Timer flip-flop 6 (TFF6) control 00 Inverts the TFF6 value (Software inversion). 01 Sets TFF6 to “1”. 10 Clear TFF6 to “0”. 11 Don’t care (Always read “11”) Timer flip-flop 6 (TFF6) invert trigger at up counter matches TREG6 0 Trigger disable (Invert prohibition) 1 Trigger enable (Invert permission) CAP4T6: Invert when the up counter value is loaded to CAP4 CAP3T6: Invert when the up counter value is loaded to CAP3 EQ7T6: Invert when up counter matches TREG7 EQ6T6: Invert when up counter matches TREG6 Timer flip-flop 6 (TFF6) invert trigger at up counter matches TREG7 0 Trigger disable (Invert prohibition) 1 Trigger enable (Invert permission) Figure 3.8.6 16-Bit Timer/Event Counter Related Register (4/6) |
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