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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP93CS32F датащи(PDF) 118 Page - Toshiba Semiconductor |
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TMP93CS32F датащи(HTML) 118 Page - Toshiba Semiconductor |
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118 / 180 page  TMP93CS32 2004-02-10 93CS32-116 3.9.2 Configuration Figure 3.9.9 shows the block diagram of the serial channel 0. Figure 3.9.9 Block Diagram of the Serial Channel 0 TXD0 (Shared with P60) φT0 φT2 φT8 φT32 SC0MOD <SC1:0> Receive buffer1(Shift register) RXDCLK SC0MOD<CTSE0> TO2TRG (Timer 2 comparator output) UART mode <BR0S3:0> Baud rate generator SC0MOD <SM1:0> ÷2 External clock I/O interface mode SC0CR <IOC> Receive counter (UART only ÷16) Transmission counter (UART only ÷16) Receive control Transmission control INTRX0 INTTX0 Receive buffer2 (SC0BUF) RB8 Error flag Serial channel interrupt control TB8 CTS0 (Shared with P62) Transmission buffer (SC0BUF) RXD0 (Shared by P61) TXDCLK SC0MOD <WU> System clock fSYS (φ1) SC0MOD<RXE> SCLK0 (Shared with P62) SCLK0 (Shared with P62) SIOCLK Internal data bus Parity control SC0CR <PE> <EVEN> Serial clock generation circuit BR0CR<BR0CK1:0> SC0CR <OERR> <PERR> <FERR> |
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