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TMP93CS32F датащи(PDF) 16 Page - Toshiba Semiconductor |
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TMP93CS32F датащи(HTML) 16 Page - Toshiba Semiconductor |
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16 / 180 page ![]() TMP93CS32 2004-02-10 93CS32-14 (1) Clock gear controller The clock gear select register SYSCR1<GEAR2:0> sets fFPH to any one of fc, fc/2, fc/4, fc/8, fc/16. Switching fFPH with the clock gear reduces the power consumption. Clock setting example: Changing gear value of the high-frequency clock SYSCR1 EQU 006FH LD (SYSCR1), XXXX0000B ; Changes fSYS to fc/2. LD (SYSCR1), XXXX0100B ; Changes fSYS to fc/32. X: Don’t care (High-frequency clock gear changing) To change the frequency of the clock gear, write the value to SYSCR1<GEAR2:0> register. It is necessary to continue the warm-up time until changing after writing the register value. There is a possibility that the instruction next to the clock-gear-changing instruction is executed by the clock gear before changing. To execute the instruction next to the clock-gear-changing instruction by the clock gear after changing, input the dummy instruction (instruction to execute the write cycle) as follows. Example: SYSCR1 EQU 006FH LD (SYSCR1), XXXX 0001B ; Changes fSYS to fc/4. LD (Dummy), 00H ; Dummy instruction. Instruction to be executed by the clock gear after changing X: Don’t care |
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