TMP93CS32F datasheet(32/180 Pages) TOSHIBA

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TMP93CS32

2004-02-10

93CS32-30

3.4.2

Micro DMA

In addition to the conventional interrupt processing, the TLCS-900 also has a micro

DMA function. When an interrupt is accepted, in addition to an interrupt vector, the CPU

receives data indicating whether processing is micro DMA mode or general-purpose

interrupt. If micro DMA mode is requested, the CPU performs micro DMA processing.

The TLCS-900 can process at very high speed because it has transfer parameters in

dedicated registers in the CPU. Since those dedicated registers are assigned as CPU

control registers, they can only be accessed by the LDC instruction.

(1) Micro DMA operation

Micro DMA operation starts when the accepted interrupt vector value matches the

micro DMA start vector value. The micro DMA has four channels so that it can be set

for up to four types of interrupt source.

When a micro DMA interrupt is accepted, data is automatically transferred from the

transfer source address to the transfer destination address set in the control register,

and the transfer counter is decremented. If the value in the counter after decrementing

is other than 0, micro DMA processing is completed; if the value in the counter after

decrementing is 0, general-purpose interrupt processing is performed.

32-bit control registers are used for setting transfer source/destination addresses.

However, the TLCS-900 has only 24 address pins for output. A 16-Mbyte space is

available for the micro DMA.

There are two data transfer modes: one-byte mode and one-word mode. Incrementing,

decrementing, and fixing the transfer source/destination address after transfer can be

done in both modes. Therefore data can easily be transferred between I/O and memory

and between I/Os. For details of transfer modes, see the description of transfer mode

registers.

The transfer counter has 16 bits, so up to 65536 transfers (The maximum when the

initial value of the transfer counter is 0000H.) can be performed for one interrupt

source by micro DMA processing.

When the transfer counter is decremented to “0” after data is transferred with micro

DMA, general-purpose interrupt processing is performed. After processing the general-

purpose interrupt, starting the interrupts of the same channel restarts the transfer

counter from 65536. If necessary, reset the transfer counter.

Interrupt sources processed by micro DMA processing are those with the Micro DMA

start vectors listed in Table 3.4.1.

The following timing chart is a micro DMA cycle of the transfer address INC

(increment) mode (Condition: MAX mode, 16-bit bus width for 16 Mbytes, 0 waits).

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