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TMP93CS32F датащи(PDF) 17 Page - Toshiba Semiconductor |
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TMP93CS32F датащи(HTML) 17 Page - Toshiba Semiconductor |
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17 / 180 page ![]() TMP93CS32 2004-02-10 93CS32-15 3.3.2 Prescaler Clock Controller The 9-bit prescaler provides a clock to 8-bit Timer 0, 1, 2, 3, 16-bit Timer 4, 5, and serial interface 0, 1. The clock input to the 9-bit prescaler is selected either fFPH or fc/16 by SYSCR0<PRCK1:0> register. <PRCK1:0> register is initialized to “00” by resetting. When the IDLE1 mode (Operates only oscillator) is used, set TRUN<PRRUN> to “0” to reduce the power consumption of 9-bit prescaler before “HALT” instruction is executed. 3.3.3 Internal Clock Pin Output Function CLK pin outputs fSYS divided by 2 internal clocks. Outputs are specified by the clock output control register CKOCR<CLKEN>. Writing “1” sets clock output, and writing “0” sets high impedance. During reset, CLK pin is internally pulled up regardless of the value of <CLKEN> register. See TMP93CS32 reset timing chart in Figure 3.1.1. Note: To set <CLKEN> = “0” and set CLK pin to high impedance, pull up externally to prevent through current which follows to the input buffer of CLK pin. |
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