MNSC140CORE datasheet(33/88 Pages) FREESCALE

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Dedicated Ethernet Signals

MSC8122 Technical Data, Rev. 13

Freescale Semiconductor

1-23

1.7 Dedicated Ethernet Signals

Most Ethernet signals are multiplexed with the DSI/system bus and the GPIO ports. In addition to the multiplexed

signals, there are three dedicated Ethernet signals that are described in Table 1-8.

GPIO29

CHIP_ID3

ETHTX_EN

Input/ Output

Input

Output

General-Purpose Input Output 29

One of 32 GPIO pins used as GPIO or as one of two dedicated inputs or one of two dedicated outputs. For

details, refer to the MSC8122 Reference Manual GPIO programming model.

Chip ID 3

Determines the chip ID of the MSC8122 DSI. It is sampled on the rising edge of PORESET signal.

Ethernet Transmit Enable

Used to enable the Ethernet transmit controller for MII and RMII modes.

GPIO30

TIMER2

TMCLK

SDA

Input/ Output

Input

Input/ Output

General-Purpose Input Output 30

One of 32 GPIO pins used as GPIO or as one of two dedicated inputs or one of two dedicated outputs.For

details, refer to the MSC8122 Reference Manual GPIO programming model.

Timer 2

Each signal is configured as either input to the counter or output from the counter. For the configuration of

the pin direction, refer to the MSC8122 Reference Manual.

External TIMER Clock

An external timer can connect directly to the SIU as the SIU clock.

I2C-Bus Data Line

This is the data line for the I2C bus.

GPIO31

TIMER3

SCL

Input/ Output

General-Purpose Input Output 31

One of 32 GPIO pins used as GPIO or as one of two dedicated inputs or one of two dedicated outputs. For

details, refer to the MSC8122 Reference Manual GPIO programming model.

Timer 3

Each signal is configured as either input to or output from the counter. For the configuration of the pin

direction, refer to the MSC8122 Reference Manual.

I2C-Bus Clock Line

This the clock line for the I2C bus.

Table 1-8.

Dedicated Ethernet Signals

Signal Name

Type

Signal Description

ETHRX_CLK

ETHSYNC_IN

Input

Receive Clock

In MII mode, provides the timing reference for the receive signals.

Sync Input

In SMII mode, is the sync signal input line.

ETHTX_CLK

ETHREF_CLK

ETHCLOCK

Input

Transmit Clock

In MII mode, provides the timing reference for transmit signals.

Reference Clock

In RMII mode, provides the timing reference.

Ethernet Clock

In SMII mode, provides the Ethernet clock signal.

Table 1-7.

GPIO, TDM, UART, Ethernet, and Timer Signals (Continued)

Signal Name

Type

Description

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