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MNSC140CORE датащи(PDF) 22 Page - Freescale Semiconductor, Inc |
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MNSC140CORE датащи(HTML) 22 Page - Freescale Semiconductor, Inc |
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22 / 88 page ![]() MSC8122 Technical Data, Rev. 13 1-12 Freescale Semiconductor Signals/Connections IRQ1 DP1 DACK1 EXT_BG2 Input Input/ Output Output Output Interrupt Request 1 One of fifteen external lines that can request a service routine, via the internal interrupt controller, from the SC140 core. System Bus Data Parity 1 The agent that drives the data bus also drives the data parity signals. The value driven on the data parity 1 pin should give odd parity (odd number of ones) on the group of signals that includes data parity 1 and D[8–15]. DMA Acknowledge 1 The DMA controller drives this output to acknowledge the DMA transaction on the bus. External Bus Grant 22 The MSC8122 asserts this pin to grant bus ownership to an external bus master. IRQ2 DP2 DACK2 EXT_DBG2 Input Input/ Output Output Output Interrupt Request 2 One of fifteen external lines that can request a service routine, via the internal interrupt controller, from the SC140 core. System Bus Data Parity 2 The agent that drives the data bus also drives the data parity signals. The value driven on the data parity 2 pin should give odd parity (odd number of ones) on the group of signals that includes data parity 2 and D[16–23]. DMA Acknowledge 2 The DMA controller drives this output to acknowledge the DMA transaction on the bus. External Data Bus Grant 22 The MSC8122 asserts this pin to grant data bus ownership to an external bus master. IRQ3 DP3 DREQ2 EXT_BR3 Input Input/ Output Input Input Interrupt Request 3 One of fifteen external lines that can request a service routine, via the internal interrupt controller, from the SC140 core. System Bus Data Parity 3 The agent that drives the data bus also drives the data parity signals. The value driven on the data parity 3 pin should give odd parity (odd number of ones) on the group of signals that includes data parity 3 and D[24–31]. DMA Request 2 Used by an external peripheral to request DMA service. External Bus Request 32 An external master should assert this pin to request bus ownership from the internal arbiter. IRQ4 DP4 DACK3 EXT_DBG3 Input Input/ Output Output Output Interrupt Request 4 One of fifteen external lines that can request a service routine, via the internal interrupt controller, from the SC140 core. System Bus Data Parity 4 The agent that drives the data bus also drives the data parity signals. The value driven on the data parity 4 pin should give odd parity (odd number of ones) on the group of signals that includes data parity 4 and D[32–39]. DMA Acknowledge 3 The DMA controller drives this output to acknowledge the DMA transaction on the bus. External Data Bus Grant 32 The MSC8122 asserts this pin to grant data bus ownership to an external bus master. Table 1-5. DSI, System Bus, Ethernet, and Interrupt Signals (Continued) Signal Name Type Description |
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