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PM7366-PI датащи(PDF) 120 Page - PMC-Sierra, Inc

номер детали PM7366-PI
подробное описание детали  FRAME ENGINE AND DATA LINK MANAGER
PDF  286 Pages
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производитель  PMC [PMC-Sierra, Inc]
домашняя страница  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7366-PI датащи(HTML) 120 Page - PMC-Sierra, Inc

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RELEASED
PM7366 FREEDM-8
DATA SHEET
PMC-1970930
ISSUE 4
FRAME ENGINE AND DATA LINK MANAGER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
107
Register 0x10C : RCAS Channel Disable
Bit
Type
Function
Default
Bit 31 to
Bit 16
Unused
XXXXH
Bit 15
R/W
CHDIS
0
Bit 14
Unused
X
Bit 13
Unused
X
Bit 12
Unused
X
Bit 11
Unused
X
Bit 10
Unused
X
Bit 9
Unused
X
Bit 8
Unused
X
Bit 7
Unused
X
Bit 6
R/W
DCHAN[6]
0
Bit 5
R/W
DCHAN[5]
0
Bit 4
R/W
DCHAN[4]
0
Bit 3
R/W
DCHAN[3]
0
Bit 2
R/W
DCHAN[2]
0
Bit 1
R/W
DCHAN[1]
0
Bit 0
R/W
DCHAN[0]
0
This register controls the disabling of one specific channel to allow orderly provisioning of
timeslots associated with that channel.
Note
This register is not byte addressable. Writing to this register modifies all the bits in the register.
Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all
four byte enables are negated, no access is made to this register.
DCHAN[6:0]:
The disable channel number bits (DCHAN[6:0]) selects the channel to be disabled. When
CHDIS is set high, the channel specified by DCHAN[6:0] is disabled. Data in timeslots
associated with the specified channel is ignored. When CHDIS is set low, the channel
specified by DCHAN[6:0] operates normally.



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