PM7366-PI datasheet(98/286 Pages) PMC

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RELEASED

PM7366 FREEDM-8

DATA SHEET

PMC-1970930

ISSUE 4

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

RPQLFI:

The receive packet descriptor large buffer free queue cache read interrupt status bit (RPQLFI)

reports receive packet descriptor large free queue cache read interrupts to the PCI host.

RPQLFI is set high when the programmable number of RPDR blocks is read from the RPDR

Large Buffer Free Queue. RPQLFI remains valid when interrupts are disabled and may be

polled to detect RPDR large buffer free queue cache read events.

RPQRDYI:

The receive packet descriptor ready queue write interrupt status bit (RPQRDYI) reports

receive packet descriptor ready queue write interrupts to the PCI host. RPQRDYI is set high

when the programmable number of RPDRs is written to the RPDR Ready Queue. RPQRDYI

remains valid when interrupts are disabled and may be polled to detect RPDR ready queue

write events.

RPDFQEI:

The receive packet descriptor free queue error interrupt status bit (RPDFQEI) reports receive

packet descriptor free queue error interrupts to the PCI host. RPDFQEI is set high upon

attempts to retrieve an RPDR when both the large buffer and small buffer free queues are

empty. RPDFQEI remains valid when interrupts are disabled and may be polled to detect

RPDR free queue empty error events.

RPDRQEI:

The receive packet descriptor ready queue error interrupt status bit (RPDRQEI) reports

receive packet descriptor ready queue error interrupts to the PCI host. RPDRQEI is set high

upon attempts to write an RPDR when ready queue is ready full. RPDRQEI remains valid

when interrupts are disabled and may be polled to detect RPDR ready queue full error events.

TDQFI:

The transmit packet descriptor free queue write interrupt status bit (TDQFI) reports transmit

packet descriptor free queue write interrupts to the PCI host. TDQFI is set high when the

programmable number of TDRs is written to the TDR Free Queue. TDQFI remains valid

when interrupts are disabled and may be polled to detect TDR free queue write events.

TDQRDYI:

The transmit descriptor ready queue cache read interrupt status bit (TDQRDYI) reports

transmit descriptor ready queue cache read interrupts to the PCI host. TDQRDYI is set high

when the programmable number of TDRs is read from the TDR Ready Queue. TDQRDYI

remains valid when interrupts are disabled and may be polled to detect TDR ready queue

cache read events.

TDFQEI:

The transmit descriptor free queue error interrupt status bit (TDFQEI) reports transmit

descriptor free queue error interrupts to the PCI host. TDFQEI is set high when an attempt to

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