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PM7366-PI датащи(PDF) 116 Page - PMC-Sierra, Inc

номер детали PM7366-PI
подробное описание детали  FRAME ENGINE AND DATA LINK MANAGER
PDF  286 Pages
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производитель  PMC [PMC-Sierra, Inc]
домашняя страница  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7366-PI датащи(HTML) 116 Page - PMC-Sierra, Inc

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RELEASED
PM7366 FREEDM-8
DATA SHEET
PMC-1970930
ISSUE 4
FRAME ENGINE AND DATA LINK MANAGER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
103
Register 0x104 : RCAS Indirect Channel Data
Bit
Type
Function
Default
Bit 31 to
Bit 16
Unused
XXXXH
Bit 15
Unused
X
Bit 14
Unused
X
Bit 13
Unused
X
Bit 12
Unused
X
Bit 11
Unused
X
Bit 10
Unused
X
Bit 9
R/W
CDLBEN
0
Bit 8
R/W
PROV
0
Bit 7
Unused
X
Bit 6
R/W
CHAN[6]
0
Bit 5
R/W
CHAN[5]
0
Bit 4
R/W
CHAN[4]
0
Bit 3
R/W
CHAN[3]
0
Bit 2
R/W
CHAN[2]
0
Bit 1
R/W
CHAN[1]
0
Bit 0
R/W
CHAN[0]
0
This register contains the data read from the channel provision RAM after an indirect read
operation or the data to be inserted into the channel provision RAM in an indirect write operation.
Note
This register is not byte addressable. Writing to this register modifies all the bits in the register.
Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all
four byte enables are negated, no access is made to this register.
CHAN[6:0]:
The indirect data bits (CHAN[6:0]) report the channel number read from the channel provision
RAM after an indirect read operation has completed. Channel number to be written to the
channel provision RAM in an indirect write operation must be set up in this register before



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