PM7366-PI datasheet(118/286 Pages) PMC

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PM7366 FREEDM-8

DATA SHEET

PMC-1970930

ISSUE 4

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

105

Bit

Type

Function

Default

Bit 31 to

Bit 16

Unused

XXXXH

Bit 15

Unused

Bit 14

Unused

Bit 13

Unused

Bit 12

Unused

Bit 11

Unused

Bit 10

Unused

Bit 9

Unused

Bit 8

Unused

Bit 7

Unused

Bit 6

R/W

FTHRES[6]

Bit 5

R/W

FTHRES[5]

Bit 4

R/W

FTHRES[4]

Bit 3

R/W

FTHRES[3]

Bit 2

R/W

FTHRES[2]

Bit 1

R/W

FTHRES[1]

Bit 0

R/W

FTHRES[0]

This register contains the threshold used by the clock activity monitor to detect for framing

bits/bytes.

Note

This register is not byte addressable. Writing to this register modifies all the bits in the register.

Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all

four byte enables are negated, no access is made to this register.

FTHRES[6:0]:

The framing bit threshold bits (FTHRES[6:0]) contains the threshold used by the clock activity

monitor to detect for the presence of framing bits. A counter in the clock activity monitor of

each receive link increments at each SYSCLK and is cleared, when the BSYNC bit of that link

is set low, by each rising edge of the corresponding RCLK[n]. When the BSYNC bit of that

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