AD4697 datasheet(11/107 Pages) AD

11 / 107 page

Data Sheet

AD4697/AD4698

ABSOLUTE MAXIMUM RATINGS

analog.com

Rev. 0 | 11 of 107

Table 3.

Parameter

Rating

Analog Inputs

INn1, COM to REFGND

−0.3 V to REF + 0.3 V

Reference Inputs

REF, REFIN to AGND, REFGND, IOGND

−0.3 V to +6 V

REF to REFIN

−6.3 V to +6.3 V

Supply Inputs

AVDD, LDO_IN to AGND, REFGND, IOGND

−0.3 V to +6 V

VDD, VIO to AGND, REFGND, IOGND

−0.3 V to +2.1 V

AVDD to LDO_IN

−6.3 V to +6.3 V

AVDD, LDO_IN to REF

−6.3 V to +6.3 V

VDD, VIO to AVDD, LDO_IN, REF

−6.3 V to +2.4 V

VDD to VIO

−2.4 V to +2.4 V

Ground

AGND, IOGND to REFGND

−0.3 V to +0.3 V

AGND to IOGND

−0.3 V to +0.3 V

Digital Inputs2 to IOGND

−0.3 V to +6 V

Digital Outputs2 to IOGND

−0.3 V to VIO + 0.3 V

Storage Temperature Range

−65°C to +150°C

Junction Temperature

150°C

Lead Temperature Soldering

260°C reflow, as per

JEDEC J-STD-020

1 INn refers to the analog inputs, Pin IN0 through Pin IN7.

2 See the Pin Configuration and Function Descriptions section for a list of the

digital input and digital output pins.

Stresses at or above those listed under Absolute Maximum Ratings

may cause permanent damage to the product. This is a stress

rating only; functional operation of the product at these or any other

conditions above those indicated in the operational section of this

specification is not implied. Operation beyond the maximum operat-

ing conditions for extended periods may affect product reliability.

THERMAL RESISTANCE

Thermal performance is directly linked to printed circuit board

(PCB) design and operating environment. Careful attention to PCB

thermal design is required.

θJA is specified for worst case conditions and is the natural con-

vection junction-to-ambient thermal resistance measured in a one

cubic foot sealed enclosure, and θJC is the junction-to-case thermal

resistance.

Thermal resistance values specified in Table 4 were calculated

based on JEDEC specifications and must be used in compliance

with JESD51-12. The worst case junction temperature is reported.

θJA is highly dependent on the application and board layout. In

applications where high maximum power dissipation exists, close

attention to thermal board design is required. The θJA value can

vary depending on PCB material, layout, and environmental condi-

tions.

Table 4. Thermal Resistance

Package Type

θJA1

θJC2

Unit

CP-24-8

41.8

°C/W

CB-36-5

41.8

0.1

°C/W

1 Simulated values are based on the JEDEC 2S2P thermal test board with

nine thermal vias in a JEDEC natural convection environment. See JEDEC

JESD-51.

2 Simulated values are measured to the package top surface with a cold plate

attached directly to the package top surface.

ELECTROSTATIC DISCHARGE (ESD) RATINGS

The following ESD information is provided for handling of ESD-sen-

sitive devices in an ESD protected area only.

Human body model (HBM) per ANSI/ESDA/JEDEC JS-001.

Field induced charged device model (FICDM) per ANSI/ESDA/JE-

DEC JS-002.

ESD Ratings for AD4697/AD4698

Table 5. AD4697/AD4698, 24-Lead LFCSP

ESD Model

Withstand Threshold (kV)

Class

HBM

FICDM

1.25

Table 6. AD4698, 36-Lead WLCSP

ESD Model

Withstand Threshold (kV)

Class

HBM

FICDM

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Charged devi-

ces and circuit boards can discharge without detection. Although

this product features patented or proprietary protection circuitry,

damage may occur on devices subjected to high energy ESD.

Therefore, proper ESD precautions should be taken to avoid

performance degradation or loss of functionality.

AD4697 датащи(PDF) 11 Page - Analog Devices

AD4697 датащи(HTML) 11 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL