UPD360 datasheet(150/221 Pages) MICROCHIP

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UPD360

DS00002084C-page 150

 2016-2017 Microchip Technology Inc.

11.4.2.17

RX FIFO Write Current Pointer Register (RX_FIFO_WR_CURRENT_PTR)

This register contains the RX FIFO write current pointer. This pointer indicates where the next received byte of data will

be stored. This register is for debug and test purpose only and should not normally be written.

Software must maintain coherency between this and the other Write Pointer Registers.

There is no hardware holding register to maintain write coherency between this and the other Write Pointer Registers.

It is assumed that this register is only written while there is no active receive.

11.4.2.18

RX FIFO Write Current Pointer Control Bits Register

(RX_FIFO_WR_CURRENT_PTR_CTL_BITS)

This register contains the auxiliary control bits of the RX FIFO write current pointer. This register is for debug and test

purpose only and should not normally be written.

Software must maintain coherency between this and the other Write Pointer Registers.

There is no hardware holding register to maintain write coherency between this and the other Write Pointer Registers.

It is assumed that this register is only written while there is no active receive.

Address:

1A52h

Size:

8 bits

Bits

Description

Type

Default

RESERVED

6:0

RX_FIFO_WR_CURRENT_PTR

This field contains the RX FIFO write current pointer.

R/W

0000000b

Address:

1A53h

Size:

8 bits

Bits

Description

Type

Default

RX_FIFO_FULL

This field indicates that the RX FIFO is full (RX FIFO Write Current Pointer

equals the RX FIFO Read Pointer.)

6:2

RESERVED

RX_FIFO_WR_CURRENT_PTR_AT_TOP

This field indicates that the RX FIFO write current pointer is at the top of the

RAM (location 127).

RX_FIFO_WR_CURRENT_PTR_WRAP

This field toggles each time the RX FIFO write current pointer wraps past the

top of the RAM (location 127).

R/W

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