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UPD360 датащи(PDF) 16 Page - Microchip Technology

номер детали UPD360
подробное описание детали  Highly Integrated Small Form Factor USB Type-C??Power Delivery 2.0 Port Controller
PDF  221 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

UPD360 датащи(HTML) 16 Page - Microchip Technology

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UPD360
DS00002084C-page 16
 2016-2017 Microchip Technology Inc.
Power
Capability 0
PWR_CAP0
IS
In the Standalone DFP mode, these signals define the
charging current supported by the device.
00b: USB 2.0 Default Current
01b: USB 3.0 Default Current
10b: 1.5 A
11b: 3.0 A
Note:
It is not valid to change the state of PWR_CAP0
and PWR_CAP1 pins after reset is de-asserted.
Note:
These signals are not available in the UPD360-
C.
Power
Capability 1
PWR_CAP1
IS
Error
Recovery
ERR_RECOVER
IS
In Standalone DFP mode (UPD360-A/UPD360-B only), this
pin determines whether or not the USB Type-C logic shall
attempt to auto-recover from an OCS or other error.
Sources from either the Port Power Switch or VCONN FET.
Note:
This signal is not available in the UPD360-C.
Sink Legacy
Current
SINK_5V_LEGACY_N
OD8
In the Standalone UFP mode (UPD360-A/UPD360-B only),
this pin asserts autonomously when a source has been
detected that provides legacy USB current.
Note:
Float this signal when unused.
Note:
This signal is not available in the UPD360-C.
Sink 1.5A
Current
SINK_5V_1A5_N
OD8
In the Standalone UFP mode (UPD360-A/UPD360-B only),
this pin asserts autonomously when a source has been
detected that provides 1.5A USB current.
Note:
Float this signal when unused.
Note:
This signal is not available in the UPD360-C.
Sink 3A
Current
SINK_5V_3A0_N
OD8
In the Standalone UFP mode (UPD360-A/UPD360-B only),
this pin asserts autonomously when a source has been
detected that provides 3.0A USB current.
Note:
Float this signal when unused.
Note:
This signal is not available in the UPD360-C.
Miscellaneous
Interrupt
IRQ_N
OD8
Active low interrupt signal.
Note:
Float this signal when unused.
VBUS
Detection
VBUS_DET
AIO
Scaled down version of VBUS. Tie this signal to VBUS via a
resistor divider.
Configuration
Select 0
CFG_SEL0
AIO
This multi-level configuration signal is sampled after a sys-
tem reset to select the device’s default mode of operation
based on the connected 1% precision resistor value.
Refer to Section 9.8.1, "Configuration Selection," on
page 81 for additional information.
TABLE 3-4:
BALL DESCRIPTIONS (CONTINUED)
NAME
SYMBOL
BUFFER
TYPE
DESCRIPTION



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