UPD360 datasheet(80/221 Pages) MICROCHIP

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UPD360

DS00002084C-page 80

 2016-2017 Microchip Technology Inc.

For a UFP, the VBUS comparator is required to determine when a DFP is attached or detached. It may also use the

comparator to determine when VBUS is within a new voltage range negotiated via PD.

If supported, the ranges 8V, 12V and 20V may be programmed in VBUS Threshold 2 and VBUS Threshold 3 registers

(see VBUS Threshold x Registers (VBUS_THRx)). Likewise 5V range, vSafe5v, can be programmed in VBUS Thresh-

old 0 and VBUS Threshold 1 registers.

The threshold for vSafe0V is programmable via the VBUS VSafe0V Threshold Register (VSAFE0V_THR).

VBUS_DET monitoring logic operates off of the 20 KHz oscillator which cycles through each threshold. Including

vSafe0v, a total of five values are compared.

Results of the comparison adjust the respective bits of the VBUS Match Register (VBUS_MATCH) and VBUS Change

Status Register (VBUS_CHG_STS) after a debounce period defined in VBUS Debounce Register (VBUS_DEB).

The VBUS Match Register (VBUS_MATCH) indicates when the value on VBUS_DET is higher than the corresponding

programmed threshold and can therefore be used to determine is VBUS is in the desired range.

A change in the state of the VBUS Match Register (VBUS_MATCH) may trigger assertion of the IRQ_N pin if appropri-

ately configured in the Power Interrupt Status Register (PWR_INT_STS).

The VBUS Debounce Clear Enable Register (VBUS_DBCLR_EN) is functionality equivalent to the CCx Debounce

Clear Enable Registers (CCx_DBCLR_EN), but it applies to the VBUS debouncer. Software programs the VBUS

Debounce Clear Enable Register (VBUS_DBCLR_EN) as required to enable debouncing the thresholds of interest.

The following example illustrates the programming model when it is desired to move VBUS from 5V to 20V after PD

contract negotiation. Initially the VBUS de-bouncer is enabled and VSafe5v, VBUS_THR0 and VBUS_THR1, is sam-

pled. VBUS_THR2 and VBUS_THR3 have an initial value in excess of 5V such as 25V. See Section 9.12.24 for details

on the VBUS_THRx registers.

Software programs the VBUS Match Enable Register (VBUS_MATCH_EN) to include new thresholds

(VBUS_THR2 and VBUS_THR3).

Software programs the VBUS Debounce Clear Enable Register (VBUS_DBCLR_EN) as required to enable per

threshold debouncing.

Software programs new thresholds for 20V in VBUS_THR2 and VBUS_THR3 (e.g. 18.5V and 21.5V). This oper-

ation restarts the VBUS debouncer.

Software waits until IRQ_N asserts.

Software confirms the VBUS_MATCH_VLD bit is set.

Software reads the VBUS Match Register (VBUS_MATCH) and VBUS Change Status Register (VBUS_CH-

G_STS).

If VBUS Change Status Register (VBUS_CHG_STS) is non-zero, software clears the status bits.

Future changes in VBUS results in IRQ_N asserting with VBUS Match Register (VBUS_MATCH) and VBUS

Change Status Register (VBUS_CHG_STS) being appropriately updated.

TABLE 9-6:

VBUS DETECTION THRESHOLDS

VBUS

Range

VBUS_DET

Comments

21.5

2.11

18.5

1.82

13.1

1.29

10.9

1.07

8.9

0.88

7.1

0.69

5.5

0.51

vSafe5V

3.67

0.33

0.8

0.08

vSafe0V

Note:

If no bits are set in the VBUS Match Register (VBUS_MATCH), after VBUS_MATCH_VLD asserts, then

the voltage observed on VBUS is less than VSafe0V.

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