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UPD360 датащи(PDF) 121 Page - Microchip Technology

номер детали UPD360
подробное описание детали  Highly Integrated Small Form Factor USB Type-C??Power Delivery 2.0 Port Controller
PDF  221 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

UPD360 датащи(HTML) 121 Page - Microchip Technology

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 2016-2017 Microchip Technology Inc.
DS00002084C-page 121
UPD360
All pointers consist of a RAM address and a wrap indication. The wrap indication is toggled each time the pointer wraps
past the top of the RAM. The wrap indication is used in the full, “no room for header” and empty comparisons to distin-
guish between the write pointers being a full RAM size ahead of the read pointer (full conditions in which case the wrap
toggles would be opposite) and the write pointers being equal to the read pointer (empty condition in which case the
wrap toggles would be equal).
All pointers and status bits are readable by the software. All pointers and wrap around status bits are writable by the
software. Software is responsible for maintaining coherency between the pointer and the wrap toggle values.
The FIFO pointers can be reset by setting and clearing the RST_RECEIVER bit in the RX Control Register A (RX_CT-
L_A).
11.2.1.1.1
Duplicate/Repeated Packet Handling
When the device is setup for automatic-response (sending of GoodCRC message), it may receive a packet multiple
times because the GoodCRC response was lost. If the original packet was received successfully then the subsequent
messages of that SOP type with matching message IDs are automatically dropped.
What the device does depends on the CRC status from CRC generator at EOP. If the CRC is good and the message
ID from current message matches that of the previous message (stored MSG_ID per SOP type), the device will not
update the Packet's status and length locations nor will it update the write head pointer and write head pointer plus one.
The FIFO space will be reclaimed at the start of the next packet. The RX_PKT_DROPPED bit in the RX Error Interrupt
Status Register (RX_ERR_IRQ_STAT) will be set to indicate this condition. The device will then resend a GoodCRC
response. If, however, the CRC generator indicates a bad CRC, or EOP is not received, the device will process the
packet like a corrupted packet. The stored MSG_ID will not be updated.
Note that a duplicate packet is dropped if Automatic Retry was enabled, the transmitter was waiting for a GoodCRC and
a message other than a GoodCRC was received (a protocol error).
The device maintains individual count of duplicate packets dropped (RX Duplicate Packet Count Register (RX_DUP_P-
KT_CNT)) and corrupt packets received (RX BadCRC Packet Count Register (RX_BADCRC_PKT_CNT)). If either of
these counts exceed 127, the DBG_EVENT bit in the RX Error Interrupt Status Register (RX_ERR_IRQ_STAT) will be
set.
11.2.1.1.2
GoodCRC Packet Storing and Dropping
In the case where Automatic Retry is enabled, and the transmitter was waiting for a GoodCRC, the GoodCRC response
will be dropped. The device will not update the packet's status and length locations nor will it update the write head
pointer and write head pointer plus one. The FIFO space will be reclaimed at the start of the next packet. Note that the
GoodCRC response is dropped even if the SOP type or message ID did not match the expected value.
Table 11-4 summarizes the conditions and results for storing or dropping good packets.



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