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UPD360 датащи(PDF) 119 Page - Microchip Technology |
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UPD360 датащи(HTML) 119 Page - Microchip Technology |
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119 / 221 page ![]() 2016-2017 Microchip Technology Inc. DS00002084C-page 119 UPD360 11.2.1.1 RX FIFO Write Interface Figure 11-1 shows how the write interface (from receive hardware's perspective) appears at various points of reception. Each RX Packet is comprised of two bytes of control information and the received packet data. The Status byte indicates whether the data is valid and the SOP type that was received. A value of 0x00 in the status byte implies that the data is not valid (including the NBytes field).When bit 0 of the status byte is 1'b1, the Nbytes field indicates the length of the packet and bits 6:4 of the status byte indicates the SOP type that was received. An empty FIFO always returns a value of 0x00. However, the status byte should not be polled, but rather the RX_FIFO_NOT_EMPTY bit in the RX Interrupt Status Register (RX_IRQ_STAT) should be used. The valid bit is retained for legacy compatibility. When software reads the packet data from the FIFO, it should only read number of bytes indicated by Nbytes (in addition to the Nbytes and Status entries). Note that the byte count indicated by NBytes includes the CRC32 data. When SMBus mode is enabled (via the EN_SMBUS_MODE bit in the RX Control Register A (RX_CTL_A)), the Status and Nbytes fields are swapped and Nbytes is incremented by 1 to include the status byte. The swapping makes the (not-recommended) polling of the Status byte impossible for this mode. When software reads the packet data from the FIFO, it should only read number of bytes indicated by NBytes (in addition to the Nbytes entry). Figure 11-2 details the format while in SMBus mode. FIGURE 11-1: WRITE INTERFACE VIEW OF RX FIFO FIGURE 11-2: RX FIFO SMBUS MODE CRC (4) byte m byte 0 Message Header CRC (4) byte n byte 0 Message Header Ram Address Nbytes* Status* CRC (4) byte n byte 0 Message Header 1900h 197Fh <- Write Head Pointer *assuming SMBus mode = 0 Free Space Free Space <- Write Head Pointer Plus One at SOP Ram Address Nbytes* Status* CRC (4) byte n byte 0 Message Header 1900h 197Fh Free Space Free Space <- Write Head Pointer Plus One during packet reception <- Write Current Pointer Ram Address Nbytes* Status* 1900h 197Fh <- Write Head Pointer, Write Current Pointer Free Space Free Space <- Write Head Pointer Plus One after packet reception <- Write Head Pointer <- Write Current Pointer byte 0 Message Header Reserved for Nbytes and Status Reserved for Nbytes and Status Nbytes* Status* CRC (4) byte m byte 0 Message Header CRC (4) byte n byte 0 Message Header SMBus mode = 1 Ram Address Nbytes* Status* 1900h 197Fh <- Write Head Pointer, Write Current Pointer Free Space Free Space <- Write Head Pointer Plus One after packet reception Nbytes* Status* |
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