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UPD360 датащи(PDF) 117 Page - Microchip Technology

номер детали UPD360
подробное описание детали  Highly Integrated Small Form Factor USB Type-C??Power Delivery 2.0 Port Controller
PDF  221 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

UPD360 датащи(HTML) 117 Page - Microchip Technology

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 2016-2017 Microchip Technology Inc.
DS00002084C-page 117
UPD360
pending auto response GoodCRC request and another packet was received resulting in another auto response Good-
CRC request, the second request will replace the first request, unless the first request had a SOP type of SOP and the
second request had a SOP type of SOP'_Debug or SOP'’_Debug. This replacement occurs regardless of the setting of
the DIS_SOP_ABRTS_NON_SOP bit in the TX Control Register A (TX_CTL_A). Even if a received packet does not
abort a pending auto response, the pending auto response may get replaced by a new auto response.
11.1.5
AUTOMATIC RETRY MODE
The device also supports an Automatic Retry Mode. In this mode, when a GoodCRC message is not received in the
appropriate time (i.e., before CRCReceiveTimer expires) the current message is retried.
Hardware will retry the message until the retry value specified in the N_RETRY_CNT field in the TX Parameters Reg-
ister C (TX_PARAM_C) is satisfied. If the N_RETRY_CNT is set to zero, Automatic Retry Mode is disabled.
The number of retries used by the device to complete the transaction are tracked and made available to software via
the N_HW_RETRIES field in the TX Status Register (TX_STAT).
An N_RETRY_CNT value of zero implies the message is attempted only once, i.e., hardware will not retry it. N_RE-
TRY_CNT specifies the number of retries so the number of attempts is (N_RETRY_CNT + 1). Stated another way, if
you want hardware to make “N” attempts to send a message then the N_RETRY_CNT field must be set to “N-1.”
Reception of Hard Reset or Cable reset (when enabled and the SOP type of the pending TX is SOP', SOP'', SOP'_De-
bug or SOP''_Debug) from port partner, messages other than GoodCRC or Ping message (if the SOP types of the RX
and TX match or if the SOP type of the RX is SOP with the SOP type of TX being non-SOP (the latter can be disabled
via the DIS_SOP_ABRTS_NON_SOP bit in the TX Control Register A (TX_CTL_A)) and the packet was not a dupli-
cate), or issuance of abort by software will terminate any pending auto retries.
Detection of bus collision will cause the device to abort the current transfer including any pending auto retries unless
the RETRY_ON_LINE_BUSY bit in the TX Control Register A (TX_CTL_A) is set.
Note that disabling of automatic-retry by setting N_RETRY_CNT to zero will also disable the device’s ability to wait for
a GoodCRC message before a successful message transmission is indicated. This applies, for example, to the case
when Soft Reset is transmitted. To circumvent this limitation, a EXPECT_GOODCRC bit in the TX Parameters Register
A (TX_PARAM_A) is available. Setting this bit will cause the device to wait for a GoodCRC in response to a TX mes-
sage, even when the N_RETRY_CNT field is set to zero.
The expected message ID within the GoodCRC message is set by software via the MSG_ID field in the TX Parameters
Register A (TX_PARAM_A). This is compared to the message ID within the received GoodCRC message.
The expected SOP type within the GoodCRC message is set by software via the TX_SOP_SELECT field in the TX
Parameters Register A (TX_PARAM_A). This is compared to the SOP type received in the GoodCRC message. In order
for the GoodCRC message to be received, it is assumed that the SOP type has been enabled via the RX_SOP_EN-
ABLE field in the RX Control Register B (RX_CTL_B).
11.1.6
IFG TIMER
The TX turn-around timer is used to insure that a minimum bus idle time is guaranteed between packet reception and
packet transmission, i.e., sending of GoodCRC message upon successful packet reception.
The value of this timer is programmable via the TX Turnaround Time Register (TX_TA_TIME). The value is specified in
uSec. This timer uses the free-running 1us pulse so the value of this register should be 1 more than desired to ensure
the minimum time.
11.1.7
CRC RECEIVE TIMER
This timer is enabled when the device is expected to wait for a GoodCRC ACK (i.e., automatic-retry mode is enabled
by non-zero value in the N_RETRY_CNT field of the TX Parameters Register C (TX_PARAM_C) or if zero, EXPECT_-
GOODCRC bit in the TX Parameters Register A (TX_PARAM_A) is set) at the time transmission is requested. This timer
can also be enabled for software usage via the EN_CRC_RCV_TMR bit in the RX Control Register A (RX_CTL_A).
If enabled, the timer starts whenever a TX packet transmission stops.
If software aborts a TX packet in between transmission with auto-retry mode enabled, this timer will not be triggered and
will be disabled. If software aborts a TX packet with auto-retry disabled, then it should also disable the timer by clearing
the EN_CRC_RCV_TMR bit in the RX Control Register A (RX_CTL_A).
Note:
Setting N_RETRY_CNT to zero after the GO bit has been set will have no effect for the current transfer.



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