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DSP56857 датащи(PDF) 156 Page - Freescale Semiconductor, Inc |
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DSP56857 датащи(HTML) 156 Page - Freescale Semiconductor, Inc |
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156 / 662 page ![]() OSC (Oscillator) Circuit Detail 5685X Digital Signal Controller User Manual, Rev. 4 6-6 Freescale Semiconductor 6.2.2 Using an External Active Clock Source Below 4 MHz When using an external active clock source of a frequency less than, or equal to, 4MHz then the connections shown below are recommended. Here, the EXTAL pin is biased to 1.65V and XTAL is driven with a 0 to 3.3V square wave clock signal. The TIME_CLK source path is the same as above, using the fixed divide by 128 block and channel 0 of the MUX. Figure 6-4. Using an External Active Low Frequency Clock, < 4 MHz Note: The CGMCR register’s TOD_SEL field may be set to either 0 or 1. The recommended setting of 0 allows very low power operation when executing a STOP instruction. If, however, a setting of 1 is used, then EXTAL can be tied to ground, to mid-rail (as shown), or high. If TOD_SEL is set to 1, then the optimal connection of EXTAL is to ground. EXTAL CGMCR[TOD_SEL] = 0 Note (1) BOLD represents default states and typical conditions. 1) See STOP Mode Features for further details Fref (4 MHz) TIME_CLK (31.25 KHz) XTAL 128 . . 2 . . (1) OSC_LOPWR Notes (1) Bandwidth limited to 4 MHz Ftime (31.25 KHz) Low Frequency Digital Clock (4 MHz) . . CGMCR[TOD] = (don’t care) |
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