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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DSP56857 датащи(PDF) 100 Page - Freescale Semiconductor, Inc |
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DSP56857 датащи(HTML) 100 Page - Freescale Semiconductor, Inc |
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100 / 662 page  Memory Maps 5685X Digital Signal Controller User Manual, Rev. 4 3-12 Freescale Semiconductor Table 3-7. Direct Memory Access 0 Register Address Map (DMA0_BASE = $1FFEC0) see Chapter 9 Address Offset Register Acronym Register Name Access Type Chapter Location Base + $0 DMA_0_TC Transfer Control Register Read/Write Section 9.6.1 Base + $1 DMA_0_CQS Circular Queue Size Register Read/Write Section 9.6.2 Base + $2 DMA_0_TC Transfer Count Register Read/Write Section 9.6.3 Base + $3 DMA_0_DAL Destination Address-Low Register Read/Write Section 9.6.4 Base + $4 DMA_0_DAH Destination Address-High Register Read/Write Section 9.6.5 Base + $5 DMA_0_SAL Source Address-Low Register Read/Write Section 9.6.6 Base + $6 DMA_0_SAH Source Address-High Register Read/Write Section 9.6.7 Table 3-8. Direct Memory Access 1 Register Address Map (DMA1_BASE = $1FFEC8) see Chapter 9 Address Offset Register Acronym Register Name Access Type Chapter Location Base + $0 DMA_1_TC Transfer Control Register Read/Write Section 9.6.1 Base + $1 DMA_1_CQS Circular Queue Size Register Read/Write Section 9.6.2 Base + $2 DMA_1_TC Transfer Count Register Read/Write Section 9.6.3 Base + $3 DMA_1_DAL Destination Address-Low Register Read/Write Section 9.6.4 Base + $4 DMA_1_DAH Destination Address-High Register Read/Write Section 9.6.5 Base + $5 DMA_1_SAL Source Address-Low Register Read/Write Section 9.6.6 Base + $6 DMA_1_SAH Source Address-High Register Read/Write Section 9.6.7 Table 3-9. Direct Memory Access 2 Register Address Map (DMA2_BASE = $1FFED0) see Chapter 9 Address Offset Register Acronym Register Name Access Type Chapter Location Base + $0 DMA_2_TC Transfer Control Register Read/Write Section 9.6.1 Base + $1 DMA_2_CQS Circular Queue Size Register Read/Write Section 9.6.2 Base + $2 DMA_2_TC Transfer Count Register Read/Write Section 9.6.3 Base + $3 DMA_2_DAL Destination Address-Low Register Read/Write Section 9.6.4 Base + $4 DMA_2_DAH Destination Address-High Register Read/Write Section 9.6.5 Base + $5 DMA_2_SAL Source Address-Low Register Read/Write Section 9.6.6 Base + $6 DMA_2_SAH Source Address-High Register Read/Write Section 9.6.7 |
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